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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-36bc02b8b57sm1804194a91.7.2026.05.29.03.26.51 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 29 May 2026 03:26:55 -0700 (PDT) Message-ID: Date: Fri, 29 May 2026 18:26:49 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 0/3] Enable CTCU and ETR devices for multiple QCOM platforms To: Suzuki K Poulose , Mike Leach , James Clark , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Tingwei Zhang , Bjorn Andersson , Konrad Dybcio Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio References: <20260204-enable-ctcu-and-etr-v3-0-0bb95c590ae1@oss.qualcomm.com> <545b4ebb-2c7e-480d-80bb-5e08dd3c52a7@arm.com> Content-Language: en-US From: Jie Gan In-Reply-To: <545b4ebb-2c7e-480d-80bb-5e08dd3c52a7@arm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTI5MDEwMyBTYWx0ZWRfX6tn6kd+XvAzu eCgB8XbplSZbY1p9iAosr/bgxJVJO0pZ2lGvRU+KTAulilsHteGgtPBJt0eetYJWtNBtvhqcmjw 5n4QeDHgogOhFZe0IvfG27YP7NAO1z0WQEKnwVRBQQxY/Ak5UY0yYLTmJftWficsWE4FmAMt5lO uep++FHEquh2v4JHxd2Bk7hDXEN/Xj/Jk24DnDynruJsBpxrhsSsWMiKuUaJUE1a0rQNXPxojqy 1ys+TE/E0fp0xfcGogdL85CKfFN0RXr/E3ToVVwKlThhNH6ksEWrp3XaAXSYao/OiYk3XUxEmZ9 74u87K3lo1zJuVucBR9ZP0nKLM7KwjeJpO1yGuwoJblteHExs5q+xKOYJq19v2uazdRMj+obhk8 8x09tFRgtEVwJ76+mbVx4B69sztaLR3mx3NzFr/tTQRtvaTk04jqIWlBZibQMWXc8PXrhDECoco R+UxWKszgtuOe5tO15w== X-Authority-Analysis: v=2.4 cv=SNBykuvH c=1 sm=1 tr=0 ts=6a1969f1 cx=c_pps a=UNFcQwm+pnOIJct1K4W+Mw==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=NGcC8JguVDcA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=VwQbUJbxAAAA:8 a=7CQSdrXTAAAA:8 a=EUspDBNiAAAA:8 a=nTQ8HVyESOUA6E9D-IoA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=uKXjsCUrEbL0IQVhDsJ9:22 a=a-qgeE7W1pNrGK8U0ZQC:22 X-Proofpoint-ORIG-GUID: EksX9h0jCcOq8p4APfYNcXsgkkkKZOXU X-Proofpoint-GUID: EksX9h0jCcOq8p4APfYNcXsgkkkKZOXU X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-05-29_03,2026-05-28_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 priorityscore=1501 malwarescore=0 spamscore=0 adultscore=0 lowpriorityscore=0 phishscore=0 impostorscore=0 clxscore=1015 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605210000 definitions=main-2605290103 On 2/27/2026 6:10 PM, Suzuki K Poulose wrote: > Hello, > > > On 04/02/2026 02:22, Jie Gan wrote: >> The DT‑binding patch adds platform‑specific compatibles for the >> CTCU device, and the following Qualcomm platforms are included: >> Kaanapali >> Pakala(sm8750) >> Hamoa(x1e80100) >> Glymur > > Given this is predominantly DTS changes, and there is very low chances > of a conflict with the binding yaml change, I would recommend this to go > via soc or the qcom platform tree. > > For the series: > > Acked-by: Suzuki K Poulose Hi Suzuki, May I ask is there a chance this patch series could go through the CoreSight tree? Thanks a lot. Jie > > >> >> Since the base Coresight DT patches for the Kaanapali and Glymur >> platforms have not yet been applied, I created DT patches only >> for the Pakala and Hamoa platforms. I will submit the Kaanapali >> and Glymur patches once their corresponding base Coresight DT patches >> are merged. >> >> The Hamoa‑related patches were posted in a separate email, and I >> have included them in the current patch series. >> >> Link to the previous Hamoa patch series: >> https://lore.kernel.org/all/20251106-enable-etr-and-ctcu-for-hamoa- >> v2-0-cdb3a18753aa@oss.qualcomm.com/ >> >> Signed-off-by: Jie Gan >> --- >> Changes in v3: >> - change back to the numeric compatible from hamoa to x1e80100. >> - Link to v2: https://lore.kernel.org/r/20260203-enable-ctcu-and-etr- >> v2-0-aacc7bd7eccb@oss.qualcomm.com >> >> Changes in v2: >> - change back to the numeric compatible from pakala to sm8750. >> - Link to v1: https://lore.kernel.org/r/20260203-enable-ctcu-and-etr- >> v1-0-a5371a2ec2b8@oss.qualcomm.com >> >> --- >> Jie Gan (3): >>        dt-binding: document QCOM platforms for CTCU device >>        arm64: dts: qcom: hamoa: enable ETR and CTCU devices >>        arm64: dts: qcom: sm8750: enable ETR and CTCU devices >> >>   .../bindings/arm/qcom,coresight-ctcu.yaml          |   4 + >>   arch/arm64/boot/dts/qcom/hamoa.dtsi                | 160 +++++++++++ >> +++++++- >>   arch/arm64/boot/dts/qcom/sm8750.dtsi               | 177 +++++++++++ >> ++++++++++ >>   3 files changed, 340 insertions(+), 1 deletion(-) >> --- >> base-commit: 193579fe01389bc21aff0051d13f24e8ea95b47d >> change-id: 20260203-enable-ctcu-and-etr-31f9e9d1088d >> >> Best regards, >