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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b8037f0ecb9sm3877057366b.56.2025.12.31.04.29.28 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 31 Dec 2025 04:29:30 -0800 (PST) Message-ID: Date: Wed, 31 Dec 2025 13:29:27 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 1/8] drm/msm/a6xx: Retrieve gmu core range by index To: Akhil P Oommen , Rob Clark , Sean Paul , Konrad Dybcio , Dmitry Baryshkov , Abhinav Kumar , Marijn Suijten , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Jessica Zhang , Gaurav Kohli Cc: Dan Carpenter , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Jie Zhang , Dmitry Baryshkov References: <20251231-qcs615-spin-2-v6-0-da87debf6883@oss.qualcomm.com> <20251231-qcs615-spin-2-v6-1-da87debf6883@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20251231-qcs615-spin-2-v6-1-da87debf6883@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMjMxMDEwOSBTYWx0ZWRfX7iqYkeWRDpXn m6LKzzREktLXimKrunijRbMfW+usRvuOaJycvnpUdGw3ZvnykqTzI9fDmuv3jUiQ+cVEStHHDjw f2by1eY+XOeGtggRr3XMcyNLFP2NbMpuFPvfXCIY1jz19fBWYMS/e0+OaqInnu2FxVyBW15iyoY K4qQ+qZp3vElHQcPsrTu1kzcaXcCticdQjwTQx0GhbDqVtvoF7D2ep2Gr6pCAu1IxBLQQblaQbT BAqRlrmeLIZdMlRJ1TyvBB59NLxWnk6WRiRR0kSJrhQ/y4ogFYxcqe5g9ooP4UEJV79gQQnYZhc iYIGnlkktDReuvDJz2Nah9txrOZKLeSS4U5HRdZGC48eY70lQ2+LLz02QLzyDiSxU5RqCGfNUhl kdhr9eIgycnIVZZw2dfu7FskOOIbtlT0sZQkBFDzsGaCtxp9TvJ2wx6op8pcPfUS5FQjnHbx/QF tgePfzBcQu1BkEKCEzQ== X-Proofpoint-GUID: gbv0wgzm--8z1JdzqNhU5Z2YMx7BMy87 X-Proofpoint-ORIG-GUID: gbv0wgzm--8z1JdzqNhU5Z2YMx7BMy87 X-Authority-Analysis: v=2.4 cv=Mdxhep/f c=1 sm=1 tr=0 ts=6955172c cx=c_pps a=WeENfcodrlLV9YRTxbY/uA==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=wP3pNCr1ah4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=bmOu7kEL96IPmD5EUUcA:9 a=QEXdDO2ut3YA:10 a=kacYvNCVWA4VmyqE58fU:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-12-31_03,2025-12-31_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 adultscore=0 spamscore=0 lowpriorityscore=0 malwarescore=0 phishscore=0 priorityscore=1501 bulkscore=0 suspectscore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2512120000 definitions=main-2512310109 On 12/31/25 9:45 AM, Akhil P Oommen wrote: > Some GPUs like A612 doesn't use a named register range resource. This > is because the reg-name property is discouraged when there is just a > single resource. > > To address this, retrieve the 'gmu' register range by its index. It is > always guaranteed to be at index 0. > > Signed-off-by: Akhil P Oommen > Reviewed-by: Dmitry Baryshkov > --- Reviewed-by: Konrad Dybcio Konrad