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Mon, 19 May 2025 22:04:35 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA02.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 54JM4YkV014811 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 19 May 2025 22:04:34 GMT Received: from [10.110.43.57] (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Mon, 19 May 2025 15:04:33 -0700 Message-ID: Date: Mon, 19 May 2025 15:04:27 -0700 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.15.1 Subject: Re: [PATCH v4 06/10] phy: qcom: Add M31 based eUSB2 PHY driver To: Konrad Dybcio , Vinod Koul CC: Melody Olvera , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Greg Kroah-Hartman , Philipp Zabel , "Bjorn Andersson" , Konrad Dybcio , Catalin Marinas , Will Deacon , , , , , , References: <20250409-sm8750_usb_master-v4-0-6ec621c98be6@oss.qualcomm.com> <20250409-sm8750_usb_master-v4-6-6ec621c98be6@oss.qualcomm.com> <0517c37d-b1ba-466e-bffd-9f47b0d458d5@quicinc.com> <5183b76b-8043-4309-b25d-e1ae505f929e@quicinc.com> <6fa4959c-d733-4d50-904f-caf933e02da9@oss.qualcomm.com> Content-Language: en-US From: Wesley Cheng In-Reply-To: <6fa4959c-d733-4d50-904f-caf933e02da9@oss.qualcomm.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 7tkQXt10AubyxISGwOFWZdq0ny_YbYf5 X-Proofpoint-ORIG-GUID: 7tkQXt10AubyxISGwOFWZdq0ny_YbYf5 X-Authority-Analysis: v=2.4 cv=DdAXqutW c=1 sm=1 tr=0 ts=682baaf3 cx=c_pps a=ouPCqIW2jiPt+lZRy3xVPw==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=GEpy-HfZoHoA:10 a=IkcTkHD0fZMA:10 a=dt9VzEwgFbYA:10 a=jJrOw3FHAAAA:8 a=VwQbUJbxAAAA:8 a=7CQSdrXTAAAA:8 a=WksZTEnvWCXEbMr8NocA:9 a=QEXdDO2ut3YA:10 a=-FEs8UIgK8oA:10 a=a-qgeE7W1pNrGK8U0ZQC:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNTE5MDIwNSBTYWx0ZWRfX4Vcchgh/WruK V7ZkJSFPodRTjs/iAtlDkF49Z8ENM9Zur72GPcH4aOTTlSSaRnzyDOiHS5u2ZXWWH8JRmXIGkWM ZEgCmEEKBHkqm8vHsn9ce/iNhHwwxRho/3tVIz29aSph9km0aEVfVQ3L4C6V9eBAXXLeaSiP3aE qnX2/7ZN4n9frNYVvm8aP5J6jVZixiPXsGjgN9HT2Tfj9bAGHHy+NG0mju7X81XgZ5J70ZTAMiR Z3RY8ONHh9RnFFgPzukmH2ZXwxKT/mQZQeVfciu8HENPNxD94UEnz2Y+q4l5rf99kgG0ujiy38D 7eU5UxSLU7UXkgM44okzqJID/bHMPJXZAKvW0R5ZNR8FHfsfPnTyE3b0hq6PRbajL6YKtgn62mr oyUZboS50pTuJRFG9RwdImoQvNmT9L9GfZEGE8zOBbHjPsEVJBU/wVs6ldIuw7LR1sxn9MAi X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.0.736,FMLib:17.12.80.40 definitions=2025-05-19_09,2025-05-16_03,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=999 clxscore=1015 phishscore=0 adultscore=0 mlxscore=0 spamscore=0 malwarescore=0 suspectscore=0 priorityscore=1501 bulkscore=0 impostorscore=0 lowpriorityscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505070000 definitions=main-2505190205 Hi Konrad, On 5/17/2025 11:28 AM, Konrad Dybcio wrote: > On 5/14/25 8:24 PM, Wesley Cheng wrote: >> Hi Vinod, >> >> On 5/14/2025 1:33 AM, Vinod Koul wrote: >>> On 16-04-25, 15:45, Wesley Cheng wrote: >>>> Hi Vinod, >>>> >>>> On 4/10/2025 4:53 AM, Vinod Koul wrote: >>>>> On 09-04-25, 10:48, Melody Olvera wrote: >>>>> >>>>>> +static int m31eusb2_phy_write_readback(void __iomem *base, u32 offset, >>>>>> + const u32 mask, u32 val) >>>>>> +{ >>>>>> + u32 write_val; >>>>>> + u32 tmp; >>>>>> + >>>>>> + tmp = readl_relaxed(base + offset); >>>>>> + tmp &= ~mask; >>>>>> + write_val = tmp | val; >>>>>> + >>>>>> + writel_relaxed(write_val, base + offset); >>>>>> + >>>>>> + tmp = readl_relaxed(base + offset); >>>>> >>>>> Why are you using _relaxed version here? >>>>> >>>> >>>> No particular reason. I think someone pointed this out previously, and I >>>> was open to use the non-relaxed variants, but I assume using the relaxed vs >>>> non-relaxed apis comes down to preference in this case. >>> >>> Nope you cant! There _needs_ to be a specific reasons! >>> When you are doing read, modify, write, it is very important to know the >>> right version to use... >>> >> >> I mean, its a write readback, which ensures the bus transaction is complete >> based on [1], hence why **in this situation** it is up to preference. >> >> Otherwise, w/o the readback then we'd need to ensure writes are made >> depending on the required sequencing (in spots where the sequence is >> strictly defined), and that can be enforced using barriers. If you feel >> like using the non-relaxed variant is preferred let me know. I can replace >> it and remove the readback. > > Readback is stronger on arm64, as otherwise the writes may be buffered and > not observable at the other endpoint even though the instruction has been > issued, even if a barrier has been issued > > Some resources: > > https://youtu.be/i6DayghhA8Q > https://lore.kernel.org/linux-arm-msm/20240618153419.GC2354@willie-the-truck/ > https://developer.arm.com/documentation/ddi0487/latest sec B2.6.9 > > There's been a real bug observed (pun not intended): > Commit 2f8cf2c3f3e3 ("clk: qcom: reset: Ensure write completion on reset de/assertion") > Thanks for sharing. Useful info...The way I interpret it, even between relaxed and non-relaxed variants, a readback is always desired. Thanks Wesley Cheng