From: "Arnd Bergmann" <arnd@arndb.de>
To: "Niko Pasaloukos" <nikolaos.pasaloukos@blaize.com>,
"James Cowgill" <james.cowgill@blaize.com>,
"Matt Redfearn" <matthew.redfearn@blaize.com>,
"Neil Jones" <neil.jones@blaize.com>,
"Rob Herring" <robh@kernel.org>,
"krzysztof.kozlowski+dt@linaro.org"
<krzysztof.kozlowski+dt@linaro.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Catalin Marinas" <catalin.marinas@arm.com>,
"Will Deacon" <will@kernel.org>,
"Olof Johansson" <olof@lixom.net>,
"Hans Verkuil" <hverkuil-cisco@xs4all.nl>,
"Shawn Guo" <shawnguo@kernel.org>,
"Hugo Villeneuve" <hvilleneuve@dimonoff.com>,
"Andre Przywara" <andre.przywara@arm.com>,
"Rafał Miłecki" <rafal@milecki.pl>,
"Bjorn Andersson" <andersson@kernel.org>,
"Konrad Dybcio" <konrad.dybcio@linaro.org>,
"AngeloGioacchino Del Regno"
<angelogioacchino.delregno@collabora.com>,
"Nishanth Menon" <nm@ti.com>,
"Neil Armstrong" <neil.armstrong@linaro.org>,
"Nícolas F. R. A. Prado" <nfraprado@collabora.com>,
"Johan Hovold" <johan+linaro@kernel.org>
Cc: "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v4 4/6] arm64: Add initial support for Blaize BLZP1600 CB2
Date: Fri, 08 Nov 2024 12:36:28 +0100 [thread overview]
Message-ID: <f38f87bf-f413-4dc3-a76e-e653dd4ad6d1@app.fastmail.com> (raw)
In-Reply-To: <20241108103120.9955-5-nikolaos.pasaloukos@blaize.com>
On Fri, Nov 8, 2024, at 11:31, Niko Pasaloukos wrote:
> Adds support for the Blaize CB2 development board based on
> BLZP1600 SoC. This consists of a Carrier-Board-2 and a SoM.
>
> The blaize-blzp1600.dtsi is the common part for the SoC,
> blaize-blzp1600-som.dtsi is the common part for the SoM and
> blaize-blzp1600-cb2.dts is the board specific file.
The split of files seems fine, but a little more information
about what this chip is used for would help, so that developers
looking at the git history later can have an idea.
> Checkpatch: ignore
> Resolves: PESW-2604
I don't understand these, can you turn these into full
english sentences? What checkpatch errors do you see and
why should I ignore them? What is PESW-2604 and how does
it relate to PLZP1600?
> +#include "blaize-blzp1600-som.dtsi"
> +#include <dt-bindings/net/ti-dp83867.h>
I don't see any references to ti-dp83867.h here, maybe leave
the #include to a later patch that actually starts using it?
> +#include "blaize-blzp1600.dtsi"
> +
> +/ {
> + memory@0 {
> + device_type = "memory";
> + reg = <0x0 0x00000000 0xffffffff>;
> + };
> +};
Is this an off-by-one error or do you intentionally
leave out the last bit of the 4GB address space?
If the last byte is actually addressable, please just
use #size-cells=<2> and make it the full 0x100000000.
Arnd
next prev parent reply other threads:[~2024-11-08 11:36 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-08 10:31 [PATCH v4 0/6] Add support for Blaize BLZP1600 SoC Niko Pasaloukos
2024-11-08 10:31 ` [PATCH v4 1/6] dt-bindings: Add Blaize vendor prefix Niko Pasaloukos
2024-11-08 10:54 ` Krzysztof Kozlowski
2024-11-08 14:18 ` Nikolaos Pasaloukos
2024-11-08 12:06 ` Krzysztof Kozlowski
2024-11-08 10:31 ` [PATCH v4 3/6] arm64: Add Blaize BLZP1600 SoC family Niko Pasaloukos
2024-11-08 10:57 ` Krzysztof Kozlowski
2024-11-08 10:31 ` [PATCH v4 2/6] dt-bindings: arm: blaize: Add Blaize BLZP1600 SoC Niko Pasaloukos
2024-11-08 10:56 ` Krzysztof Kozlowski
2024-11-08 10:31 ` [PATCH v4 4/6] arm64: Add initial support for Blaize BLZP1600 CB2 Niko Pasaloukos
2024-11-08 11:36 ` Arnd Bergmann [this message]
2024-11-08 10:31 ` [PATCH v4 5/6] arm64: defconfig: Enable ARCH_BLAIZE_BLZP1600 Niko Pasaloukos
2024-11-08 10:59 ` Krzysztof Kozlowski
2024-11-08 10:31 ` [PATCH v4 6/6] MAINTAINER: Add entry for Blaize SoC Niko Pasaloukos
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