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Fri, 24 Jan 2025 10:04:00 -0500 (EST) X-Mailer: MessagingEngine.com Webmail Interface Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Fri, 24 Jan 2025 16:03:28 +0100 From: "Arnd Bergmann" To: "Linus Torvalds" Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, soc@lists.linux.dev Message-Id: In-Reply-To: <1f0939fd-1694-476e-954f-e58ff8650dd9@app.fastmail.com> References: <1f0939fd-1694-476e-954f-e58ff8650dd9@app.fastmail.com> Subject: [GIT PULL 2/5] soc: new SoC support for 6.14 Content-Type: text/plain Content-Transfer-Encoding: 7bit The following changes since commit fac04efc5c793dccbd07e2d59af9f90b7fc0dca4: Linux 6.13-rc2 (2024-12-08 14:03:39 -0800) are available in the Git repository at: https://git.kernel.org/pub/scm/linux/kernel/git/soc/soc.git tags/soc-new-6.14 for you to fetch changes up to 0bcf3ac14626f1c174c262834656603769579497: Merge tag 'spacemit-dt-for-6.14-1' of https://github.com/spacemit-com/linux into soc/newsoc (2025-01-23 17:36:29 +0100) ---------------------------------------------------------------- soc: new SoC support for 6.14 Two new SoC families are added here, with devicetree files and a little bit of infrastructure to allow booting: - Blaize BLZP1600 is an AI chip using custom GSP (Graph Streaming Processor) cores for computation, and two small Cortex-A53 cores that run the operating system. - SpacemiT K1 is a 64-bit RISC-V chip, using eight custom RVA22 compatible CPU cores with vector support. Also marketed at AI applications, it has a much slower NPU compared to BLZP1600, but in turn focuses on the CPU performance ---------------------------------------------------------------- Arnd Bergmann (1): Merge tag 'spacemit-dt-for-6.14-1' of https://github.com/spacemit-com/linux into soc/newsoc Nikolaos Pasaloukos (6): dt-bindings: Add Blaize vendor prefix dt-bindings: arm: blaize: Add Blaize BLZP1600 SoC arm64: Add Blaize BLZP1600 SoC family arm64: dts: Add initial support for Blaize BLZP1600 CB2 arm64: defconfig: Enable Blaize BLZP1600 platform MAINTAINER: Add entry for Blaize SoC Yangyu Chen (8): dt-bindings: riscv: Add SpacemiT X60 compatibles dt-bindings: riscv: add SpacemiT K1 bindings dt-bindings: timer: Add SpacemiT K1 CLINT dt-bindings: interrupt-controller: Add SpacemiT K1 PLIC riscv: add SpacemiT SoC family Kconfig support riscv: dts: add initial SpacemiT K1 SoC device tree riscv: dts: spacemit: add Banana Pi BPI-F3 board device tree riscv: defconfig: enable SpacemiT SoC Yixun Lan (4): MAINTAINERS: setup support for SpacemiT SoC tree dt-bindings: serial: 8250: Add SpacemiT K1 uart compatible riscv: dts: spacemit: add pinctrl property to uart0 in BPI-F3 riscv: dts: spacemit: move aliases to board dts Documentation/devicetree/bindings/arm/blaize.yaml | 40 ++ .../interrupt-controller/sifive,plic-1.0.0.yaml | 1 + Documentation/devicetree/bindings/riscv/cpus.yaml | 1 + .../devicetree/bindings/riscv/spacemit.yaml | 28 ++ Documentation/devicetree/bindings/serial/8250.yaml | 4 +- .../devicetree/bindings/timer/sifive,clint.yaml | 1 + .../devicetree/bindings/vendor-prefixes.yaml | 2 + MAINTAINERS | 18 + arch/arm64/Kconfig.platforms | 5 + arch/arm64/boot/dts/Makefile | 1 + arch/arm64/boot/dts/blaize/Makefile | 2 + arch/arm64/boot/dts/blaize/blaize-blzp1600-cb2.dts | 83 ++++ .../arm64/boot/dts/blaize/blaize-blzp1600-som.dtsi | 23 ++ arch/arm64/boot/dts/blaize/blaize-blzp1600.dtsi | 205 ++++++++++ arch/arm64/configs/defconfig | 1 + arch/riscv/Kconfig.socs | 5 + arch/riscv/boot/dts/Makefile | 1 + arch/riscv/boot/dts/spacemit/Makefile | 2 + arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts | 26 ++ arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi | 20 + arch/riscv/boot/dts/spacemit/k1.dtsi | 452 +++++++++++++++++++++ arch/riscv/configs/defconfig | 1 + 22 files changed, 921 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/arm/blaize.yaml create mode 100644 Documentation/devicetree/bindings/riscv/spacemit.yaml create mode 100644 arch/arm64/boot/dts/blaize/Makefile create mode 100644 arch/arm64/boot/dts/blaize/blaize-blzp1600-cb2.dts create mode 100644 arch/arm64/boot/dts/blaize/blaize-blzp1600-som.dtsi create mode 100644 arch/arm64/boot/dts/blaize/blaize-blzp1600.dtsi create mode 100644 arch/riscv/boot/dts/spacemit/Makefile create mode 100644 arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts create mode 100644 arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi create mode 100644 arch/riscv/boot/dts/spacemit/k1.dtsi