From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752732AbdBUNDj (ORCPT ); Tue, 21 Feb 2017 08:03:39 -0500 Received: from foss.arm.com ([217.140.101.70]:60252 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752677AbdBUNDh (ORCPT ); Tue, 21 Feb 2017 08:03:37 -0500 Subject: Re: [PATCH 6/7] ARM: NOMMU: Set ARM_DMA_MEM_BUFFERABLE for M-class cpus To: Robin Murphy , linux-arm-kernel@lists.infradead.org References: <1487152792-34214-1-git-send-email-vladimir.murzin@arm.com> <1487152792-34214-7-git-send-email-vladimir.murzin@arm.com> <63bebf6f-8dc5-7a03-ba7b-e05d83fdfce8@arm.com> Cc: kbuild-all@01.org, linux@armlinux.org.uk, akpm@linux-foundation.org, linux-kernel@vger.kernel.org From: Vladimir Murzin Message-ID: Date: Tue, 21 Feb 2017 13:03:29 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.7.0 MIME-Version: 1.0 In-Reply-To: <63bebf6f-8dc5-7a03-ba7b-e05d83fdfce8@arm.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 21/02/17 12:57, Robin Murphy wrote: > On 15/02/17 09:59, Vladimir Murzin wrote: >> Now, we have dedicated non-cacheable region for consistent DMA >> operations. However, that region can still be marked as bufferable by >> MPU, so it'd be safer to have barriers by default. > > Makes sense - plenty of cases want their DMA buffers to still be > write-combining (e.g. framebuffers have already been mentioned here), > for which strongly-ordered mappings won't do. Plus you don't exactly > have a choice if you've no MPU and have fixed Normal attributes for your > RAM region. > > Reviewed-by: Robin Murphy Thanks! Vladimir > >> Tested-by: Benjamin Gaignard >> Tested-by: Andras Szemzo >> Tested-by: Alexandre TORGUE >> Signed-off-by: Vladimir Murzin >> --- >> arch/arm/mm/Kconfig | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig >> index 0b79f12..64a1465c 100644 >> --- a/arch/arm/mm/Kconfig >> +++ b/arch/arm/mm/Kconfig >> @@ -1029,7 +1029,7 @@ config ARM_L1_CACHE_SHIFT >> >> config ARM_DMA_MEM_BUFFERABLE >> bool "Use non-cacheable memory for DMA" if (CPU_V6 || CPU_V6K) && !CPU_V7 >> - default y if CPU_V6 || CPU_V6K || CPU_V7 >> + default y if CPU_V6 || CPU_V6K || CPU_V7 || CPU_V7M >> help >> Historically, the kernel has used strongly ordered mappings to >> provide DMA coherent memory. With the advent of ARMv7, mapping >> > >