From: Like Xu <like.xu.linux@gmail.com>
To: Yang Weijiang <weijiang.yang@intel.com>,
Jim Mattson <jmattson@google.com>
Cc: pbonzini@redhat.com, seanjc@google.com, vkuznets@redhat.com,
wei.w.wang@intel.com, kvm@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v7 03/15] KVM: x86: Add Arch LBR MSRs to msrs_to_save_all list
Date: Mon, 9 Aug 2021 21:07:01 +0800 [thread overview]
Message-ID: <f3b5364c-3e3c-eca0-f973-1658bd619e87@gmail.com> (raw)
In-Reply-To: <1628235745-26566-4-git-send-email-weijiang.yang@intel.com>
On 6/8/2021 3:42 pm, Yang Weijiang wrote:
> Arch LBR MSR_ARCH_LBR_DEPTH and MSR_ARCH_LBR_CTL are {saved|restored}
> by userspace application if they're available.
>
> Suggested-by: Jim Mattson <jmattson@google.com>
> Signed-off-by: Yang Weijiang <weijiang.yang@intel.com>
> Reviewed-by: Jim Mattson <jmattson@google.com>
> ---
> arch/x86/kvm/x86.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> index 4116567f3d44..4ae173ab2208 100644
> --- a/arch/x86/kvm/x86.c
> +++ b/arch/x86/kvm/x86.c
> @@ -1327,6 +1327,7 @@ static const u32 msrs_to_save_all[] = {
> MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
> MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
> MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
> + MSR_ARCH_LBR_CTL, MSR_ARCH_LBR_DEPTH,
Hi Jim,
Do you have a particular reason for not putting the set of
MSR_ARCH_LBR_{FROM, TO, INFO} into msrs_to_save_all[]
for {saved|restored} by user space ?
> };
>
> static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
> @@ -6229,6 +6230,11 @@ static void kvm_init_msr_list(void)
> min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
> continue;
> break;
> + case MSR_ARCH_LBR_DEPTH:
> + case MSR_ARCH_LBR_CTL:
> + if (!kvm_cpu_cap_has(X86_FEATURE_ARCH_LBR))
> + continue;
> + break;
> default:
> break;
> }
>
next prev parent reply other threads:[~2021-08-09 13:07 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-06 7:42 [PATCH v7 00/15] Introduce Architectural LBR for vPMU Yang Weijiang
2021-08-06 7:42 ` [PATCH v7 01/15] perf/x86/intel: Fix the comment about guest LBR support on KVM Yang Weijiang
2021-08-06 7:42 ` [PATCH v7 02/15] perf/x86/lbr: Simplify the exposure check for the LBR_INFO registers Yang Weijiang
2021-08-06 7:42 ` [PATCH v7 03/15] KVM: x86: Add Arch LBR MSRs to msrs_to_save_all list Yang Weijiang
2021-08-09 13:07 ` Like Xu [this message]
2021-08-06 7:42 ` [PATCH v7 04/15] KVM: vmx/pmu: Emulate MSR_ARCH_LBR_DEPTH for guest Arch LBR Yang Weijiang
2021-08-09 13:16 ` Like Xu
2021-08-10 7:38 ` Yang Weijiang
2021-08-10 7:54 ` Like Xu
2021-08-10 9:08 ` Yang Weijiang
2021-08-06 7:42 ` [PATCH v7 05/15] KVM: vmx/pmu: Emulate MSR_ARCH_LBR_CTL " Yang Weijiang
2021-08-06 16:26 ` kernel test robot
2021-08-09 13:36 ` Like Xu
2021-08-10 8:30 ` Yang Weijiang
2021-08-10 8:37 ` Like Xu
2021-08-06 7:42 ` [PATCH v7 06/15] KVM: x86/pmu: Refactor code to support " Yang Weijiang
2021-08-06 7:42 ` [PATCH v7 07/15] KVM: x86: Refresh CPUID on writes to MSR_IA32_XSS Yang Weijiang
2021-08-06 7:42 ` [PATCH v7 08/15] KVM: x86: Report XSS as an MSR to be saved if there are supported features Yang Weijiang
2021-08-06 7:42 ` [PATCH v7 09/15] KVM: x86: Refine the matching and clearing logic for supported_xss Yang Weijiang
2021-08-06 7:42 ` [PATCH v7 10/15] KVM: x86: Add XSAVE Support for Architectural LBR Yang Weijiang
2021-08-06 7:42 ` [PATCH v7 11/15] KVM: x86/vmx: Check Arch LBR config when return perf capabilities Yang Weijiang
2021-08-06 7:42 ` [PATCH v7 12/15] KVM: nVMX: Add necessary Arch LBR settings for nested VM Yang Weijiang
2021-08-06 7:42 ` [PATCH v7 13/15] KVM: x86/vmx: Clear Arch LBREn bit before inject #DB to guest Yang Weijiang
2021-08-09 5:08 ` Like Xu
2021-08-09 9:02 ` Yang Weijiang
2021-08-06 7:42 ` [PATCH v7 14/15] KVM: x86/vmx: Flip Arch LBREn bit on guest state change Yang Weijiang
2021-08-06 7:42 ` [PATCH v7 15/15] KVM: x86/cpuid: Advise Arch LBR feature in CPUID Yang Weijiang
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