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([2a01:e0a:982:cbb0:11d4:7c71:accf:6521]) by smtp.gmail.com with ESMTPSA id l13-20020a5d410d000000b0022cbcfa8447sm4665456wrp.87.2022.09.28.09.01.40 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 28 Sep 2022 09:01:41 -0700 (PDT) Message-ID: Date: Wed, 28 Sep 2022 18:01:40 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.11.0 Subject: Re: [PATCH 05/13] phy: qcom-qmp-pcie: unify sdm845 registers Content-Language: en-US To: Johan Hovold , Vinod Koul Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Kishon Vijay Abraham I , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org References: <20220928152822.30687-1-johan+linaro@kernel.org> <20220928152822.30687-6-johan+linaro@kernel.org> Reply-To: neil.armstrong@linaro.org From: Neil Armstrong Organization: Linaro Developer Services In-Reply-To: <20220928152822.30687-6-johan+linaro@kernel.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 28/09/2022 17:28, Johan Hovold wrote: > The SDM845 register array is identical to pciephy_regs_layout so drop > the former. > > Signed-off-by: Johan Hovold > --- > drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 8 +------- > 1 file changed, 1 insertion(+), 7 deletions(-) > > diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c > index 7b3f7e42edd5..4146545fdf5f 100644 > --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c > +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c > @@ -92,12 +92,6 @@ static const unsigned int pciephy_regs_layout[QPHY_LAYOUT_SIZE] = { > [QPHY_PCS_STATUS] = 0x174, > }; > > -static const unsigned int sdm845_qmp_pciephy_regs_layout[QPHY_LAYOUT_SIZE] = { > - [QPHY_SW_RESET] = 0x00, > - [QPHY_START_CTRL] = 0x08, > - [QPHY_PCS_STATUS] = 0x174, > -}; > - > static const unsigned int sdm845_qhp_pciephy_regs_layout[QPHY_LAYOUT_SIZE] = { > [QPHY_SW_RESET] = 0x00, > [QPHY_START_CTRL] = 0x08, > @@ -1545,7 +1539,7 @@ static const struct qmp_phy_cfg sdm845_qmp_pciephy_cfg = { > .num_resets = ARRAY_SIZE(sdm845_pciephy_reset_l), > .vreg_list = qmp_phy_vreg_l, > .num_vregs = ARRAY_SIZE(qmp_phy_vreg_l), > - .regs = sdm845_qmp_pciephy_regs_layout, > + .regs = pciephy_regs_layout, > > .start_ctrl = PCS_START | SERDES_START, > .pwrdn_ctrl = SW_PWRDN | REFCLK_DRV_DSBL, Isn't is an issue if QPHY_COM_* entries are in pciephy_regs_layout and not in sdm845_qmp_pciephy_regs_layout ? BTW it seems those QPHY_COM_* are never used.. Neil