From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from gentwo.org (gentwo.org [62.72.0.81]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A2A7B364044; Wed, 27 May 2026 19:09:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=62.72.0.81 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779908988; cv=none; b=Rc9D6AIEx49fsc27V50SI2dEicdSvaAOvLKSeXGszHYVB6BcSnXJBOGf+LhkB3h8B9TqHYMvmnembyAeC7IAy1BFOrJkeJ9P6VmrHVUidGeH+xC5i9L2cjp+sHRtyym4xqbtrr5bWH7WshLkbWFxgUrLn8FX0pFiD2yTFmCrto0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779908988; c=relaxed/simple; bh=DSMCJR6Zd1R2Z0r8q8ps2jvA+/AS8t4dZSXSYBFqwo0=; h=Date:From:To:cc:Subject:In-Reply-To:Message-ID:References: MIME-Version:Content-Type; b=XAI7m/9Ht3YAayANI8AGsna1GAE1Toet4i4UL97Pi0Mk/ASOPgFc1GjMDFy7renQck5yb2hWSXTRyCXesM3aLP2ijxg2mIPFSCBPALdR1UlIgs1a7fE1ZMjp7QF+LHyoUMUp9mjY30JtirAJwctZYrsvzWHbC2nfJyxbYlUtvkc= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=gentwo.org; spf=pass smtp.mailfrom=gentwo.org; dkim=pass (1024-bit key) header.d=gentwo.org header.i=@gentwo.org header.b=IRFmmZWI; arc=none smtp.client-ip=62.72.0.81 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=gentwo.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gentwo.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=gentwo.org header.i=@gentwo.org header.b="IRFmmZWI" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gentwo.org; s=default; t=1779908986; bh=DSMCJR6Zd1R2Z0r8q8ps2jvA+/AS8t4dZSXSYBFqwo0=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=IRFmmZWIoQUL6BbmuCTjfMXdOOk2y5dHLG0WS+H8XlTcTDGQk3ISmFkUmeRp0hf1K w5XZMdUG2gx263KojI4IX3345hmHwCMdxPLgWQrrL0K3xe2/zi/E9wfNz9FnhPuahA wtTg2FZiu6mtt0xwjDeZh4wjjioxeQ68F0C4tshU= Received: by gentwo.org (Postfix, from userid 1003) id E3165402E4; Wed, 27 May 2026 12:09:46 -0700 (PDT) Received: from localhost (localhost [127.0.0.1]) by gentwo.org (Postfix) with ESMTP id E1E934014B; Wed, 27 May 2026 12:09:46 -0700 (PDT) Date: Wed, 27 May 2026 12:09:46 -0700 (PDT) From: "Christoph Lameter (Ampere)" To: Heiko Carstens cc: Yang Shi , David Laight , Alexander Gordeev , Sven Schnelle , Vasily Gorbik , Christian Borntraeger , Juergen Christ , Peter Zijlstra , Shrikanth Hegde , linux-kernel@vger.kernel.org, linux-s390@vger.kernel.org Subject: Re: [PATCH v3 0/9] s390: Improve this_cpu operations In-Reply-To: <20260522091805.18098A5c-hca@linux.ibm.com> Message-ID: References: <20260520092243.264847-1-hca@linux.ibm.com> <9d503c6f-5641-4b28-998e-01e38b3622a9@os.amperecomputing.com> <20260520233409.0683f595@pumpkin> <20260521103742.9603C8c-hca@linux.ibm.com> <5158d4e8-19a7-4f60-b2fd-bc6bab22baf0@os.amperecomputing.com> <20260522091805.18098A5c-hca@linux.ibm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII On Fri, 22 May 2026, Heiko Carstens wrote: > Also with the current proposal I only did some quick micro benchmarks, > which resulted in 0-1% improvement, which is in the expected range. > > It is amazing to see the performance improvements you see on arm64, however > I believe that is mainly because of the large amount of code which is > generated by the arm64 implementations of the preempt primitives > __preempt_count_add() and __preempt_count_dec_and_test(). The code is generated if you have no arch specific per cpu mechanism and preemption must be supported. We have now the situation that we cannot switch off preemption support anymore. It seem that S390 has this mechanism in a small way and therefore can avoid the preempt enable/disable. It is not the quantity of code here. The preempt enable/disable can only be avoided if there is a single instruction doing the per cpu operation. A single instruction cannot be interupted and therefore is preemption safe. > That's a big difference to s390: for both primitives the result is a single > instruction. Ok then you can already use single instructions like x86 and will not have preempt enable/disable overhead. I am not sure what David Laight's code is supposed to do. Seems weird to me.