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([2a01:e0a:e17:9700:16d2:7456:6634:9626]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-46e61a4161bsm253473805e9.16.2025.10.05.23.43.51 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 05 Oct 2025 23:43:51 -0700 (PDT) Message-ID: Date: Mon, 6 Oct 2025 08:43:50 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v7 3/5] drivers: firmware: add riscv SSE support To: Anup Patel Cc: Paul Walmsley , Palmer Dabbelt , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Himanshu Chauhan , Anup Patel , Xu Lu , Atish Patra , =?UTF-8?B?QmrDtnJuIFTDtnBlbA==?= , Yunhui Cui , Conor Dooley References: <20250908181717.1997461-1-cleger@rivosinc.com> <20250908181717.1997461-4-cleger@rivosinc.com> Content-Language: en-US From: =?UTF-8?B?Q2zDqW1lbnQgTMOpZ2Vy?= In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 06/10/2025 07:38, Anup Patel wrote: > On Mon, Sep 8, 2025 at 11:50 PM Clément Léger wrote: >> >> Add driver level interface to use RISC-V SSE arch support. This interface >> allows registering SSE handlers, and receive them. This will be used by >> PMU and GHES driver. >> >> Co-developed-by: Himanshu Chauhan >> Signed-off-by: Himanshu Chauhan >> Signed-off-by: Clément Léger >> Acked-by: Conor Dooley >> --- >> MAINTAINERS | 15 + >> drivers/firmware/Kconfig | 1 + >> drivers/firmware/Makefile | 1 + >> drivers/firmware/riscv/Kconfig | 15 + >> drivers/firmware/riscv/Makefile | 3 + >> drivers/firmware/riscv/riscv_sbi_sse.c | 701 +++++++++++++++++++++++++ >> include/linux/riscv_sbi_sse.h | 57 ++ >> 7 files changed, 793 insertions(+) >> create mode 100644 drivers/firmware/riscv/Kconfig >> create mode 100644 drivers/firmware/riscv/Makefile >> create mode 100644 drivers/firmware/riscv/riscv_sbi_sse.c >> create mode 100644 include/linux/riscv_sbi_sse.h >> >> diff --git a/MAINTAINERS b/MAINTAINERS >> index fe168477caa4..684d23f852c3 100644 >> --- a/MAINTAINERS >> +++ b/MAINTAINERS >> @@ -21648,6 +21648,13 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/iommu/linux.git >> F: Documentation/devicetree/bindings/iommu/riscv,iommu.yaml >> F: drivers/iommu/riscv/ >> >> +RISC-V FIRMWARE DRIVERS >> +M: Conor Dooley >> +L: linux-riscv@lists.infradead.org >> +S: Maintained >> +T: git git://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git >> +F: drivers/firmware/riscv/* >> + >> RISC-V MICROCHIP FPGA SUPPORT >> M: Conor Dooley >> M: Daire McNamara >> @@ -21712,6 +21719,14 @@ F: arch/riscv/boot/dts/spacemit/ >> N: spacemit >> K: spacemit >> >> +RISC-V SSE DRIVER >> +M: Clément Léger >> +R: Himanshu Chauhan >> +L: linux-riscv@lists.infradead.org >> +S: Maintained >> +F: drivers/firmware/riscv/riscv_sse.c >> +F: include/linux/riscv_sse.h >> + >> RISC-V THEAD SoC SUPPORT >> M: Drew Fustini >> M: Guo Ren >> diff --git a/drivers/firmware/Kconfig b/drivers/firmware/Kconfig >> index bbd2155d8483..1894df87b08e 100644 >> --- a/drivers/firmware/Kconfig >> +++ b/drivers/firmware/Kconfig >> @@ -294,6 +294,7 @@ source "drivers/firmware/meson/Kconfig" >> source "drivers/firmware/microchip/Kconfig" >> source "drivers/firmware/psci/Kconfig" >> source "drivers/firmware/qcom/Kconfig" >> +source "drivers/firmware/riscv/Kconfig" >> source "drivers/firmware/samsung/Kconfig" >> source "drivers/firmware/smccc/Kconfig" >> source "drivers/firmware/tegra/Kconfig" >> diff --git a/drivers/firmware/Makefile b/drivers/firmware/Makefile >> index 4ddec2820c96..6cdd84570ea7 100644 >> --- a/drivers/firmware/Makefile >> +++ b/drivers/firmware/Makefile >> @@ -34,6 +34,7 @@ obj-y += efi/ >> obj-y += imx/ >> obj-y += psci/ >> obj-y += qcom/ >> +obj-y += riscv/ >> obj-y += samsung/ >> obj-y += smccc/ >> obj-y += tegra/ >> diff --git a/drivers/firmware/riscv/Kconfig b/drivers/firmware/riscv/Kconfig >> new file mode 100644 >> index 000000000000..ed5b663ac5f9 >> --- /dev/null >> +++ b/drivers/firmware/riscv/Kconfig >> @@ -0,0 +1,15 @@ >> +# SPDX-License-Identifier: GPL-2.0-only >> +menu "Risc-V Specific firmware drivers" >> +depends on RISCV >> + >> +config RISCV_SBI_SSE >> + bool "Enable SBI Supervisor Software Events support" >> + depends on RISCV_SBI >> + default y >> + help >> + The Supervisor Software Events support allows the SBI to deliver >> + NMI-like notifications to the supervisor mode software. When enabled, >> + this option provides support to register callbacks on specific SSE >> + events. >> + >> +endmenu >> diff --git a/drivers/firmware/riscv/Makefile b/drivers/firmware/riscv/Makefile >> new file mode 100644 >> index 000000000000..c8795d4bbb2e >> --- /dev/null >> +++ b/drivers/firmware/riscv/Makefile >> @@ -0,0 +1,3 @@ >> +# SPDX-License-Identifier: GPL-2.0 >> + >> +obj-$(CONFIG_RISCV_SBI_SSE) += riscv_sbi_sse.o >> diff --git a/drivers/firmware/riscv/riscv_sbi_sse.c b/drivers/firmware/riscv/riscv_sbi_sse.c >> new file mode 100644 >> index 000000000000..57b6dad92482 >> --- /dev/null >> +++ b/drivers/firmware/riscv/riscv_sbi_sse.c >> @@ -0,0 +1,701 @@ >> +// SPDX-License-Identifier: GPL-2.0-only >> +/* >> + * Copyright (C) 2024 Rivos Inc. >> + */ >> + >> +#define pr_fmt(fmt) "sse: " fmt >> + >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> + >> +#include >> +#include >> + >> +struct sse_event { >> + struct list_head list; >> + u32 evt_id; >> + u32 priority; >> + sse_event_handler_fn *handler; >> + void *handler_arg; >> + /* Only valid for global events */ >> + unsigned int cpu; >> + >> + union { >> + struct sse_registered_event *global; >> + struct sse_registered_event __percpu *local; >> + }; >> +}; >> + >> +static int sse_hp_state; >> +static bool sse_available __ro_after_init; >> +static DEFINE_SPINLOCK(events_list_lock); >> +static LIST_HEAD(events); >> +static DEFINE_MUTEX(sse_mutex); >> + >> +struct sse_registered_event { >> + struct sse_event_arch_data arch; >> + struct sse_event *event; >> + unsigned long attr; >> + bool is_enabled; >> +}; >> + > > > >> + >> +static int __init sse_init(void) >> +{ >> + int ret; >> + >> + if (sbi_probe_extension(SBI_EXT_SSE) <= 0) { >> + pr_err("Missing SBI SSE extension\n"); > > We might have older firmware which implements an older > SBI spec version so we should not throw errors over here. > Please change this to pr_info(). Yeah indeed, that might confuse the end-user. Thanks, Clément > > Regards, > Anup