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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-af91a750253sm2374258966b.86.2025.08.13.03.13.32 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 13 Aug 2025 03:13:33 -0700 (PDT) Message-ID: Date: Wed, 13 Aug 2025 12:13:31 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] phy: qcom: qmp-pcie: Fix PHY initialization when powered down by firmware To: Stephan Gerhold , Vinod Koul Cc: Kishon Vijay Abraham I , Wenbin Yao , Qiang Yu , Manivannan Sadhasivam , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, Konrad Dybcio References: <20250812-phy-qcom-qmp-pcie-nocsr-fix-v1-1-9a7d0a5d2b46@linaro.org> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20250812-phy-qcom-qmp-pcie-nocsr-fix-v1-1-9a7d0a5d2b46@linaro.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwODExMDA3NCBTYWx0ZWRfX+0P3oYvDIu6z HOFtX1ynSzNHTImVT/eAYMOIesliVnZVyzegwCj1UWQC6jmEG0POc84nTsv2bV7I9Xt/xnTUT// 7IZqBHwcNaNx4uELEWnkgqFLDp7SmgYHf4h7kyPjc9w09sTATXA9yy+4Us/rpOtLFfWBGVq1Ojx L9X9NleDJJKJeSZKTumVMLSUC2UVfM1G0spI5XHICjzsUpeOtjVFooTTP5SLVTxQTmTATYhIEPa gi3o3IRDdVDX2BzOS2ye0Z3Eb1+n6v7Qw+pDzetjNBFL9PwmXUDDycVu6U6C0nUZDEQyFShf6Cy 21k67qEyDRGa+CKlmffWzeFqBSS3a098cSBTMBnJ9TOwXv2Sb5RPOKHI0LTXf080yuDl0lGRM34 sZaZQV2/ X-Proofpoint-GUID: -46oI2u1diKknCAwF2ghEWdPk6enYjrU X-Authority-Analysis: v=2.4 cv=TJFFS0la c=1 sm=1 tr=0 ts=689c6550 cx=c_pps a=EVbN6Ke/fEF3bsl7X48z0g==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=2OwXVqhp2XgA:10 a=VwQbUJbxAAAA:8 a=KKAkSRfTAAAA:8 a=t-ghYzj4duJAONndmXwA:9 a=QEXdDO2ut3YA:10 a=a_PwQJl-kcHnX1M80qC6:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-ORIG-GUID: -46oI2u1diKknCAwF2ghEWdPk6enYjrU X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-08-12_08,2025-08-11_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 suspectscore=0 adultscore=0 impostorscore=0 malwarescore=0 phishscore=0 clxscore=1015 spamscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2508110074 On 8/12/25 6:30 PM, Stephan Gerhold wrote: > Commit 0cc22f5a861c ("phy: qcom: qmp-pcie: Add PHY register retention > support") added support for using the "no_csr" reset to skip configuration > of the PHY if the init sequence was already applied by the boot firmware. > The expectation is that the PHY is only turned on/off by using the "no_csr" > reset, instead of powering it down and re-programming it after a full > reset. > > The boot firmware on X1E does not fully conform to this expectation: If the > PCIe3 link fails to come up (e.g. because no PCIe card is inserted), the > firmware powers down the PHY using the QPHY_PCS_POWER_DOWN_CONTROL > register. The QPHY_START_CTRL register is kept as-is, so the driver assumes > the PHY is already initialized and skips the configuration/power up > sequence. The PHY won't come up again without clearing the > QPHY_PCS_POWER_DOWN_CONTROL, so eventually initialization fails: > > qcom-qmp-pcie-phy 1be0000.phy: phy initialization timed-out > phy phy-1be0000.phy.0: phy poweron failed --> -110 > qcom-pcie 1bd0000.pcie: cannot initialize host > qcom-pcie 1bd0000.pcie: probe with driver qcom-pcie failed with error -110 > > This can be reliably reproduced on the X1E CRD, QCP and Devkit when no card > is inserted for PCIe3. > > Fix this by checking the QPHY_PCS_POWER_DOWN_CONTROL register in addition > to QPHY_START_CTRL. If the PHY is powered down with the register, it > doesn't conform to the expectations for using the "no_csr" reset, so we > fully re-initialize with the normal reset sequence. > > Cc: stable@vger.kernel.org > Fixes: 0cc22f5a861c ("phy: qcom: qmp-pcie: Add PHY register retention support") > Signed-off-by: Stephan Gerhold > --- > drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c > index 95830dcfdec9b1f68fd55d1cc3c102985cfafcc1..6a469a8f5ae7eba6e4d1d702efaae1c658c4321e 100644 > --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c > +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c > @@ -4339,10 +4339,12 @@ static int qmp_pcie_init(struct phy *phy) > struct qmp_pcie *qmp = phy_get_drvdata(phy); > const struct qmp_phy_cfg *cfg = qmp->cfg; > void __iomem *pcs = qmp->pcs; > - bool phy_initialized = !!(readl(pcs + cfg->regs[QPHY_START_CTRL])); > int ret; > > - qmp->skip_init = qmp->nocsr_reset && phy_initialized; > + qmp->skip_init = qmp->nocsr_reset && > + readl(pcs + cfg->regs[QPHY_START_CTRL]) && > + readl(pcs + cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL]); I think it would be good to ensure the value matches platform config expectations, i.e. !(val & cfg->pwrdn_ctrl) Konrad