From: Alexander Graf <graf@amazon.com>
To: Sean Christopherson <sean.j.christopherson@intel.com>
Cc: Aaron Lewis <aaronlewis@google.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Jonathan Corbet <corbet@lwn.net>,
Vitaly Kuznetsov <vkuznets@redhat.com>,
Wanpeng Li <wanpengli@tencent.com>,
Jim Mattson <jmattson@google.com>,
"Joerg Roedel" <joro@8bytes.org>,
KarimAllah Raslan <karahmed@amazon.de>,
"Dan Carpenter" <dan.carpenter@oracle.com>,
kvm list <kvm@vger.kernel.org>, <linux-doc@vger.kernel.org>,
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v6 1/7] KVM: x86: Deflect unknown MSR accesses to user space
Date: Wed, 16 Sep 2020 21:15:53 +0200 [thread overview]
Message-ID: <f45fb79a-d09a-bdbb-8529-77219171435b@amazon.com> (raw)
In-Reply-To: <20200916170839.GD10227@sjchrist-ice>
On 16.09.20 19:08, Sean Christopherson wrote:
>
> On Wed, Sep 16, 2020 at 11:31:30AM +0200, Alexander Graf wrote:
>> On 03.09.20 21:27, Aaron Lewis wrote:
>>>> @@ -412,6 +414,15 @@ struct kvm_run {
>>>> __u64 esr_iss;
>>>> __u64 fault_ipa;
>>>> } arm_nisv;
>>>> + /* KVM_EXIT_X86_RDMSR / KVM_EXIT_X86_WRMSR */
>>>> + struct {
>>>> + __u8 error; /* user -> kernel */
>>>> + __u8 pad[3];
>>>
>>> __u8 pad[7] to maintain 8 byte alignment? unless we can get away with
>>> fewer bits for 'reason' and
>>> get them from 'pad'.
>>
>> Why would we need an 8 byte alignment here? I always thought natural u64
>> alignment on x86_64 was on 4 bytes?
>
> u64 will usually (always?) be 8 byte aligned by the compiler. "Natural"
> alignment means an object is aligned to its size. E.g. an 8-byte object
> can split a cache line if it's only aligned on a 4-byte boundary.
For some reason I always thought that x86_64 had a special hack that
allows u64s to be "naturally" aligned on a 32bit boundary. But I just
double checked what you said and indeed, gcc does pad it to an actual
natural boundary.
You never stop learning :).
In that case, it absolutely makes sense to make the padding explicit
(and pull it earlier)!
Alex
Amazon Development Center Germany GmbH
Krausenstr. 38
10117 Berlin
Geschaeftsfuehrung: Christian Schlaeger, Jonathan Weiss
Eingetragen am Amtsgericht Charlottenburg unter HRB 149173 B
Sitz: Berlin
Ust-ID: DE 289 237 879
next prev parent reply other threads:[~2020-09-16 19:22 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-02 12:59 [PATCH v6 0/7] Allow user space to restrict and augment MSR emulation Alexander Graf
2020-09-02 12:59 ` [PATCH v6 1/7] KVM: x86: Deflect unknown MSR accesses to user space Alexander Graf
2020-09-03 19:27 ` Aaron Lewis
2020-09-16 9:31 ` Alexander Graf
2020-09-16 17:08 ` Sean Christopherson
2020-09-16 19:15 ` Alexander Graf [this message]
2020-09-17 19:38 ` Aaron Lewis
2020-09-02 12:59 ` [PATCH v6 2/7] KVM: x86: Add infrastructure for MSR filtering Alexander Graf
2020-09-02 12:59 ` [PATCH v6 3/7] KVM: x86: Prepare MSR bitmaps for userspace tracked MSRs Alexander Graf
2020-09-02 12:59 ` [PATCH v6 4/7] KVM: x86: SVM: Prevent MSR passthrough when MSR access is denied Alexander Graf
2020-09-02 12:59 ` [PATCH v6 5/7] KVM: x86: VMX: " Alexander Graf
2020-09-04 2:18 ` Aaron Lewis
2020-09-16 19:44 ` Alexander Graf
2020-09-16 20:13 ` Aaron Lewis
2020-09-16 20:36 ` Alexander Graf
2020-09-02 12:59 ` [PATCH v6 6/7] KVM: x86: Introduce MSR filtering Alexander Graf
2020-09-02 12:59 ` [PATCH v6 7/7] KVM: selftests: Add test for user space MSR handling Alexander Graf
2020-09-03 19:31 ` Aaron Lewis
-- strict thread matches above, loose matches on Subject: below --
2020-09-01 20:15 [PATCH v6 0/7] Allow user space to restrict and augment MSR emulation Alexander Graf
2020-09-01 20:15 ` [PATCH v6 1/7] KVM: x86: Deflect unknown MSR accesses to user space Alexander Graf
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