From: David Laight <David.Laight@ACULAB.COM>
To: 'Mark Rutland' <mark.rutland@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"agordeev@linux.ibm.com" <agordeev@linux.ibm.com>,
"aou@eecs.berkeley.edu" <aou@eecs.berkeley.edu>,
"bp@alien8.de" <bp@alien8.de>,
"dave.hansen@linux.intel.com" <dave.hansen@linux.intel.com>,
"davem@davemloft.net" <davem@davemloft.net>,
"gor@linux.ibm.com" <gor@linux.ibm.com>,
"hca@linux.ibm.com" <hca@linux.ibm.com>,
"linux-arch@vger.kernel.org" <linux-arch@vger.kernel.org>,
"linux@armlinux.org.uk" <linux@armlinux.org.uk>,
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"robin.murphy@arm.com" <robin.murphy@arm.com>,
"tglx@linutronix.de" <tglx@linutronix.de>,
"torvalds@linux-foundation.org" <torvalds@linux-foundation.org>,
"viro@zeniv.linux.org.uk" <viro@zeniv.linux.org.uk>,
"will@kernel.org" <will@kernel.org>
Subject: RE: [PATCH v2 1/4] lib: test copy_{to,from}_user()
Date: Thu, 23 Mar 2023 22:16:12 +0000 [thread overview]
Message-ID: <f4d24e8024e84ec5a20ab17b6c2d7f60@AcuMS.aculab.com> (raw)
In-Reply-To: <ZBsLGTYjKoUTLrva@FVFF77S0Q05N>
From: Mark Rutland
> Sent: 22 March 2023 14:05
....
> > IIUC, in such tests you only vary the destination offset. Our copy
> > routines in general try to align the source and leave the destination
> > unaligned for performance. It would be interesting to add some variation
> > on the source offset as well to spot potential issues with that part of
> > the memcpy routines.
>
> I have that on my TODO list; I had intended to drop that into the
> usercopy_params. The only problem is that the cross product of size,
> src_offset, and dst_offset gets quite large.
I thought that is was better to align the writes and do misaligned reads.
Although maybe copy_to/from_user() would be best aligning the user address
(to avoid page faults part way through a misaligned access).
OTOH, on x86, is it even worth bothering at all.
I have measured a performance drop for misaligned reads, but it
was less than 1 clock per cache line in a test that was doing
2 misaligned reads in at least some of the clock cycles.
I think the memory read path can do two AVX reads each clock.
So doing two misaligned 64bit reads isn't stressing it.
David
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Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, MK1 1PT, UK
Registration No: 1397386 (Wales)
next prev parent reply other threads:[~2023-03-23 22:16 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-21 12:25 [PATCH v2 0/4] usercopy: generic tests + arm64 fixes Mark Rutland
2023-03-21 12:25 ` [PATCH v2 1/4] lib: test copy_{to,from}_user() Mark Rutland
2023-03-21 17:09 ` Catalin Marinas
2023-03-22 14:05 ` Mark Rutland
2023-03-23 22:16 ` David Laight [this message]
2023-03-27 10:11 ` Catalin Marinas
2023-03-21 18:04 ` Linus Torvalds
2023-03-22 13:55 ` Mark Rutland
2023-03-21 12:25 ` [PATCH v2 2/4] lib: test clear_user() Mark Rutland
2023-03-21 17:13 ` Catalin Marinas
2023-03-21 12:25 ` [PATCH v2 3/4] arm64: fix __raw_copy_to_user semantics Mark Rutland
2023-03-21 17:50 ` Linus Torvalds
2023-03-22 14:16 ` Mark Rutland
2023-03-22 14:48 ` Catalin Marinas
2023-03-22 15:30 ` Mark Rutland
2023-03-22 16:39 ` Linus Torvalds
2023-03-21 12:25 ` [PATCH v2 4/4] arm64: fix clear_user() semantics Mark Rutland
2023-11-15 22:30 ` [PATCH v2 0/4] usercopy: generic tests + arm64 fixes Kees Cook
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