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([2001:b07:6468:f312:c8dd:75d4:99ab:290a]) by smtp.gmail.com with ESMTPSA id r11sm12850914edt.58.2021.01.26.10.16.13 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 26 Jan 2021 10:16:14 -0800 (PST) Subject: Re: [RFC 4/7] KVM: MMU: Refactor pkr_mask to cache condition To: Chenyi Qiang , Sean Christopherson , Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Joerg Roedel , Xiaoyao Li Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org References: <20200807084841.7112-1-chenyi.qiang@intel.com> <20200807084841.7112-5-chenyi.qiang@intel.com> From: Paolo Bonzini Message-ID: Date: Tue, 26 Jan 2021 19:16:13 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.6.0 MIME-Version: 1.0 In-Reply-To: <20200807084841.7112-5-chenyi.qiang@intel.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 07/08/20 10:48, Chenyi Qiang wrote: > > * index of the protection domain, so pte_pkey * 2 is > * is the index of the first bit for the domain. > */ > - pkr_bits = (vcpu->arch.pkru >> (pte_pkey * 2)) & 3; > + if (pte_access & PT_USER_MASK) > + pkr_bits = (vcpu->arch.pkru >> (pte_pkey * 2)) & 3; > + else > + pkr_bits = 0; > > - /* clear present bit, replace PFEC.RSVD with ACC_USER_MASK. */ > - offset = (pfec & ~1) + > - ((pte_access & PT_USER_MASK) << (PFERR_RSVD_BIT - PT_USER_SHIFT)); > + /* clear present bit */ > + offset = (pfec & ~1); > > pkr_bits &= mmu->pkr_mask >> offset; > errcode |= -pkr_bits & PFERR_PK_MASK; I think this is incorrect. mmu->pkr_mask must cover both clear and set ACC_USER_MASK, in to cover all combinations of CR4.PKE and CR4.PKS. Right now, check_pkey is !ff && pte_user, but you need to make it something like check_pkey = !ff && (pte_user ? cr4_pke : cr4_pks); Paolo