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Subject: Re: [PATCH v6 17/41] dt-bindings: clock: Add bindings for DA8XX
 CFGCHIP clocks
To: David Lechner <david@lechnology.com>, <linux-clk@vger.kernel.org>,
        <devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>
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From: Sekhar Nori <nsekhar@ti.com>
Message-ID: <f57cae4e-560a-0ea4-16dd-bdf8696d4f7b@ti.com>
Date: Mon, 5 Feb 2018 15:12:35 +0530
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On Friday 02 February 2018 11:20 PM, David Lechner wrote:
> On 02/02/2018 12:20 AM, Sekhar Nori wrote:
>> On Saturday 20 January 2018 10:43 PM, David Lechner wrote:
>>> +EMIFA clock source (ASYNC1)
>>> +---------------------------
>>> +Required properties:
>>> +- compatible: shall be "ti,da850-async1-clksrc".
>>> +- #clock-cells: from common clock binding; shall be set to 0.
>>> +- clocks: phandles to the parent clocks corresponding to clock-names
>>> +- clock-names: shall be "pll0_sysclk3", "div4.5"
>>
>> Is this clock really referred to as aysnc1 in documentation? I don't get
>> hits for async1 in OMAP-L138 TRM.
>>
> 
> It looks like it is only called ASYNC1 in the datasheet, not the TRM.
> 
> Table 6-5. Maximum Internal Clock Frequencies at Each Voltage Operating
> Point

I see it now. Its fine to use async1 then.

Thanks,
Sekhar