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AJvYcCVPc2kiROoGA0TDHFI0Iiakhir1XGgb6biwKdvEqRPevHtotCFON6kmlC+ROaAauGtMrgmudYcbVWYiF08=@vger.kernel.org X-Gm-Message-State: AOJu0Yw4rP90BURh7uQ69rToJkVMv6iSv3ICkiPHO98EQ8UcmRzrnJIx 0FNcXHY9DZzgAE/iXB1MwxTrsTPX8Sz2hvilRTba7SJo03NGwV/wn92MjJN4H80= X-Google-Smtp-Source: AGHT+IFuHqksscHYCKJL9TXvwIn0/9t2dRL5asA5FUu4BuQuURI1Ofgo7nnNngECV7K4h3RPflkjHA== X-Received: by 2002:a05:600c:190e:b0:42c:aeee:80c with SMTP id 5b1f17b1804b1-432b752a8b9mr8941955e9.9.1731063833114; Fri, 08 Nov 2024 03:03:53 -0800 (PST) Received: from [172.16.24.83] ([89.101.241.141]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432aa70a23fsm100508225e9.33.2024.11.08.03.03.51 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 08 Nov 2024 03:03:52 -0800 (PST) Message-ID: Date: Fri, 8 Nov 2024 12:03:51 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/2] perf: Fujitsu: Add the Uncore PCI PMU driver To: Yoshihiro Furudera , Will Deacon , Mark Rutland , Jonathan Corbet , Catalin Marinas , linux-arm-kernel@lists.infradead.org, Bjorn Andersson , Geert Uytterhoeven , Dmitry Baryshkov , Konrad Dybcio , Neil Armstrong , Arnd Bergmann , =?UTF-8?B?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= , Thomas Gleixner , Peter Zijlstra , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org References: <20241108054006.2550856-1-fj5100bi@fujitsu.com> <20241108054006.2550856-3-fj5100bi@fujitsu.com> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzysztof.kozlowski@linaro.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 08/11/2024 06:40, Yoshihiro Furudera wrote: > This adds a new dynamic PMU to the Perf Events framework to program and > control the Uncore PCI PMUs in Fujitsu chips. > > This driver was created with reference to drivers/perf/qcom_l3_pmu.c. > > This driver exports formatting and event information to sysfs so it can > be used by the perf user space tools with the syntaxes: > > perf stat -e pci_iod0_pci0/ea-pci/ ls > perf stat -e pci_iod0_pci0/event=0x80/ ls > > FUJITSU-MONAKA Specification URL: > https://github.com/fujitsu/FUJITSU-MONAKA > > Signed-off-by: Yoshihiro Furudera > --- > .../admin-guide/perf/fujitsu_pci_pmu.rst | 20 + > arch/arm64/configs/defconfig | 1 + > drivers/perf/Kconfig | 9 + > drivers/perf/Makefile | 1 + > drivers/perf/fujitsu_pci_pmu.c | 613 ++++++++++++++++++ > include/linux/cpuhotplug.h | 1 + > 6 files changed, 645 insertions(+) > create mode 100644 Documentation/admin-guide/perf/fujitsu_pci_pmu.rst > create mode 100644 drivers/perf/fujitsu_pci_pmu.c > > diff --git a/Documentation/admin-guide/perf/fujitsu_pci_pmu.rst b/Documentation/admin-guide/perf/fujitsu_pci_pmu.rst > new file mode 100644 > index 000000000000..5fee3a3ccc86 > --- /dev/null > +++ b/Documentation/admin-guide/perf/fujitsu_pci_pmu.rst > @@ -0,0 +1,20 @@ > +=========================================================================== > +Fujitsu Uncore PCI Performance Monitoring Unit (PMU) > +=========================================================================== > + > +This driver supports the Uncore PCI PMUs found in Fujitsu chips. > +Each PCI PMU on these chips is exposed as a uncore perf PMU with device name > +pci_iod_pci. > + > +The driver provides a description of its available events and configuration > +options in sysfs, see /sys/bus/event_sources/devices/pci_iod_pci/. > +Given that these are uncore PMUs the driver also exposes a "cpumask" sysfs > +attribute which contains a mask consisting of one CPU which will be used to > +handle all the PMU events. > + > +Examples for use with perf:: > + > + perf stat -e pci_iod0_pci0/ea-pci/ ls > + > +Given that these are uncore PMUs the driver does not support sampling, therefore > +"perf record" will not work. Per-task perf sessions are not supported. > diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig > index 2ef412937228..d7df90205be6 100644 > --- a/arch/arm64/configs/defconfig > +++ b/arch/arm64/configs/defconfig > @@ -1576,6 +1576,7 @@ CONFIG_ARM_SMMU_V3_PMU=m > CONFIG_ARM_DSU_PMU=m > CONFIG_FSL_IMX8_DDR_PMU=m > CONFIG_FUJITSU_MAC_PMU=y > +CONFIG_FUJITSU_PCI_PMU=y Same concerns. There is no such ARCH and this must be sent via your SoC folks. Best regards, Krzysztof