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From: Jan Beulich <jbeulich@suse.com>
To: Stefano Stabellini <sstabellini@kernel.org>
Cc: "Huang Rui" <ray.huang@amd.com>,
	"Alex Deucher" <alexander.deucher@amd.com>,
	"Christian König" <christian.koenig@amd.com>,
	"Stewart Hildebrand" <Stewart.Hildebrand@amd.com>,
	"Xenia Ragiadakou" <burzalodowa@gmail.com>,
	"Honglei Huang" <honglei1.huang@amd.com>,
	"Julia Zhang" <julia.zhang@amd.com>,
	"Chen Jiqian" <Jiqian.Chen@amd.com>,
	"Juergen Gross" <jgross@suse.com>,
	"Oleksandr Tyshchenko" <oleksandr_tyshchenko@epam.com>,
	"Boris Ostrovsky" <boris.ostrovsky@oracle.com>,
	"Roger Pau Monné" <roger.pau@citrix.com>,
	xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org,
	dri-devel@lists.freedesktop.org, amd-gfx@lists.freedesktop.org
Subject: Re: [RFC PATCH 1/5] x86/xen: disable swiotlb for xen pvh
Date: Wed, 15 Mar 2023 07:49:55 +0100	[thread overview]
Message-ID: <f5e03f2a-8176-528f-e885-9a97940367c0@suse.com> (raw)
In-Reply-To: <alpine.DEB.2.22.394.2303141747350.863724@ubuntu-linux-20-04-desktop>

On 15.03.2023 01:52, Stefano Stabellini wrote:
> On Mon, 13 Mar 2023, Jan Beulich wrote:
>> On 12.03.2023 13:01, Huang Rui wrote:
>>> Xen PVH is the paravirtualized mode and takes advantage of hardware
>>> virtualization support when possible. It will using the hardware IOMMU
>>> support instead of xen-swiotlb, so disable swiotlb if current domain is
>>> Xen PVH.
>>
>> But the kernel has no way (yet) to drive the IOMMU, so how can it get
>> away without resorting to swiotlb in certain cases (like I/O to an
>> address-restricted device)?
> 
> I think Ray meant that, thanks to the IOMMU setup by Xen, there is no
> need for swiotlb-xen in Dom0. Address translations are done by the IOMMU
> so we can use guest physical addresses instead of machine addresses for
> DMA. This is a similar case to Dom0 on ARM when the IOMMU is available
> (see include/xen/arm/swiotlb-xen.h:xen_swiotlb_detect, the corresponding
> case is XENFEAT_not_direct_mapped).

But how does Xen using an IOMMU help with, as said, address-restricted
devices? They may still need e.g. a 32-bit address to be programmed in,
and if the kernel has memory beyond the 4G boundary not all I/O buffers
may fulfill this requirement.

Jan

  parent reply	other threads:[~2023-03-15  6:55 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-12 12:01 [RFC PATCH 0/5] Add Xen PVH dom0 support for GPU Huang Rui
2023-03-12 12:01 ` [RFC PATCH 1/5] x86/xen: disable swiotlb for xen pvh Huang Rui
2023-03-13  8:56   ` Jan Beulich
2023-03-15  0:52     ` Stefano Stabellini
2023-03-15  4:14       ` Huang Rui
2023-03-15  6:52         ` Jan Beulich
2023-03-15  6:49       ` Jan Beulich [this message]
2023-03-15 23:25         ` Stefano Stabellini
2023-03-16  7:50           ` Jan Beulich
2023-03-16 13:45             ` Alex Deucher
2023-03-16 13:48               ` Juergen Gross
2023-03-16 13:53                 ` Alex Deucher
2023-03-16 13:58                   ` Jan Beulich
2023-03-16 14:20                   ` Juergen Gross
2023-03-16 23:09                     ` Stefano Stabellini
2023-03-17 10:19                       ` Roger Pau Monné
2023-03-17 14:45                       ` Alex Deucher
2023-03-21 18:55                         ` Christian König
2023-03-16 16:28   ` Roger Pau Monné
2023-03-12 12:01 ` [RFC PATCH 2/5] xen/grants: update initialization order of xen grant table Huang Rui
2023-03-15 12:31   ` Roger Pau Monné
2023-03-12 12:01 ` [RFC PATCH 3/5] drm/amdgpu: set passthrough mode for xen pvh/hvm Huang Rui
2023-03-15 12:42   ` Roger Pau Monné
2023-03-12 12:01 ` [RFC PATCH 4/5] x86/xen: acpi registers gsi for xen pvh Huang Rui
2023-03-15 14:00   ` Roger Pau Monné
2023-03-12 12:01 ` [RFC PATCH 5/5] xen/privcmd: add IOCTL_PRIVCMD_GSI_FROM_IRQ Huang Rui
2023-03-15 14:26   ` Roger Pau Monné

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