From: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
To: Rob Herring <robh@kernel.org>
Cc: Jyri Sarha <jyri.sarha@iki.fi>,
Vignesh Raghavendra <vigneshr@ti.com>, Nishanth Menon <nm@ti.com>,
DRI Development <dri-devel@lists.freedesktop.org>,
Devicetree <devicetree@vger.kernel.org>,
Linux ARM Kernel <linux-arm-kernel@lists.infradead.org>,
Linux Kernel <linux-kernel@vger.kernel.org>,
Nikhil Devshatwar <nikhil.nd@ti.com>,
Aradhya Bhatia <a-bhatia1@ti.com>
Subject: Re: [PATCH 1/2] dt-bindings: display: ti,am65x-dss: Add missing register & interrupt
Date: Wed, 20 Apr 2022 10:05:34 +0300 [thread overview]
Message-ID: <f5eb63b1-8381-99c8-55fa-cc9287103aa8@ideasonboard.com> (raw)
In-Reply-To: <Yl7FEuHEy66KUc5F@robh.at.kernel.org>
Hi,
On 19/04/2022 17:20, Rob Herring wrote:
> On Tue, Apr 19, 2022 at 12:33:01PM +0530, Aradhya Bhatia wrote:
>> The DSS IP on the ti-am65x soc supports an additional register space,
>> named "common1". Further. the IP services a maximum number of 2
>> interrupts.
>>
>> Add the missing register space "common1" and the additional interrupt.
>>
>> Signed-off-by: Aradhya Bhatia <a-bhatia1@ti.com>
>> ---
>> .../devicetree/bindings/display/ti/ti,am65x-dss.yaml | 10 +++++++---
>> 1 file changed, 7 insertions(+), 3 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml
>> index 5c7d2cbc4aac..102059e9e0d5 100644
>> --- a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml
>> +++ b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml
>> @@ -26,6 +26,7 @@ properties:
>> Addresses to each DSS memory region described in the SoC's TRM.
>> items:
>> - description: common DSS register area
>> + - description: common1 DSS register area
>
> You've just broken the ABI.
>
> New entries have to go on the end.
I'm curious, if the 'reg-names' is a required property, as it is here,
does this still break the ABI?
Tomi
next prev parent reply other threads:[~2022-04-20 7:05 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-19 7:03 [PATCH 0/2] Update register & interrupt info in am65x DSS Aradhya Bhatia
2022-04-19 7:03 ` [PATCH 1/2] dt-bindings: display: ti,am65x-dss: Add missing register & interrupt Aradhya Bhatia
2022-04-19 12:12 ` Rob Herring
2022-04-19 12:40 ` Nishanth Menon
2022-04-19 14:20 ` Rob Herring
2022-04-20 7:05 ` Tomi Valkeinen [this message]
2022-04-20 21:30 ` Rob Herring
2022-04-19 7:03 ` [PATCH 2/2] arm64: dts: ti: k3-am65: Add missing register & interrupt in DSS node Aradhya Bhatia
2022-04-19 12:06 ` [PATCH 0/2] Update register & interrupt info in am65x DSS Tomi Valkeinen
2022-04-19 17:29 ` Aradhya Bhatia
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