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Wed, 12 Feb 2025 22:59:47 -0800 (PST) Message-ID: Subject: Re: [PATCH v4 0/7] USB31DRD phy updates for Google Tensor gs101 (orientation & DWC3 rpm) From: =?ISO-8859-1?Q?Andr=E9?= Draszik To: Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Marek Szyprowski , Sylwester Nawrocki , Alim Akhtar Cc: Peter Griffin , Tudor Ambarus , Sam Protsenko , Will McVicker , Roy Luo , kernel-team@android.com, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, Krzysztof Kozlowski Date: Thu, 13 Feb 2025 06:59:46 +0000 In-Reply-To: <75e01bf815e5f7692d4b7aa261054851a943fece.camel@linaro.org> References: <20241206-gs101-phy-lanes-orientation-phy-v4-0-f5961268b149@linaro.org> <75e01bf815e5f7692d4b7aa261054851a943fece.camel@linaro.org> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.52.2-2 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Hi Vinod, On Mon, 2025-01-06 at 14:26 +0000, Andr=C3=A9 Draszik wrote: > Hi Vinod, >=20 > On Fri, 2024-12-06 at 16:31 +0000, Andr=C3=A9 Draszik wrote: > > Hi, > >=20 > > This series enables USB3 Type-C lane orientation detection and > > configuration on platforms that support this (Google gs101), and it > > also allows the DWC3 core to enter runtime suspend even when UDC is > > active. >=20 > Friendly ping on this series :-) Do you require anything else? Ping again :-) Cheers, Andre'