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[2a01:cb08:52d:7400:bbd7:ca83:de4a:f625]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-45da0fe1a41sm61784681f8f.31.2026.05.20.15.26.25 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 20 May 2026 15:26:25 -0700 (PDT) Message-ID: Date: Thu, 21 May 2026 00:26:24 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 02/11] arm64: dts: qcom: sc8280xp-arcata: Enable backlight To: Douglas Anderson , Neil Armstrong , Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Krzysztof Kozlowski References: <20260520-surface-sp9-5g-for-next-v1-0-9df52552bf87@gmail.com> <20260520-surface-sp9-5g-for-next-v1-2-9df52552bf87@gmail.com> Content-Language: en-US From: =?UTF-8?Q?J=C3=A9r=C3=B4me_de_Bretagne?= In-Reply-To: <20260520-surface-sp9-5g-for-next-v1-2-9df52552bf87@gmail.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit On 5/20/26 18:40, Jérôme de Bretagne via B4 Relay wrote: > From: Jérôme de Bretagne > > Add backlight nodes and enable backlight so that it can be controlled > with the corresponding buttons found on Surface Pro Type Cover keyboards. > > The nodes are almost identical to the ones from the ThinkPad X13s with > a different enable GPIO for the vreg_edp_bl node. > > The difference was found by looking at the output of /sys/kernel/debug/gpio > on the ThinkPad X13s to see the properties of its enable gpio9: > > gpiochip1: GPIOs 742-751, parent: platform/c440000.spmi:pmic@1:gpio@8800, c440000.spmi:pmic@1:gpio@8800: > ... > gpio9 : out high normal vin-1 pull-down 10uA push-pull medium atest-1 dtest-0 > ... > > The same gpio9 on the Surface Pro 9 5G has different properties: > > gpiochip0: 10 GPIOs, parent: platform/c440000.spmi:pmic@1:gpio@8800, c440000.spmi:pmic@1:gpio@8800: > ... > gpio9 : in high normal vin-1 pull-up 30uA push-pull low atest-1 dtest-0 > ... > > Looking for a match on the Surface Pro 9 5G pointed to this only one: > > gpiochip2: 10 GPIOs, parent: platform/c440000.spmi:pmic@3:gpio@8800, c440000.spmi:pmic@3:gpio@8800: > ... > gpio6 : out high normal vin-1 pull-down 10uA push-pull medium atest-1 dtest-0 > ... > > Signed-off-by: Jérôme de Bretagne > --- > .../boot/dts/qcom/sc8280xp-microsoft-arcata.dts | 49 ++++++++++++++++++++++ > 1 file changed, 49 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts b/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts > index f2b4470d4407fb5b6a3dbac8bc972c010c31bd06..14287092fb07ea15e527fd318f7ea2155448b26c 100644 > --- a/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts > +++ b/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts > @@ -46,6 +46,16 @@ wcd938x: audio-codec { > #sound-dai-cells = <1>; > }; > > + backlight: backlight { > + compatible = "pwm-backlight"; > + pwms = <&pmc8280c_lpg 3 1000000>; > + enable-gpios = <&pmc8280_1_gpios 8 GPIO_ACTIVE_HIGH>; > + power-supply = <&vreg_edp_bl>; > + > + pinctrl-0 = <&edp_bl_en>, <&edp_bl_pwm>; > + pinctrl-names = "default"; > + }; > + Investigating the feedback I got from an AI bot review [1], I plan to update this patch in v2. Let me know what you think. I was skeptical at first but upon review I've tried the following patch: diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts b/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts index f938e68c69ea..82e0a01276a8 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts @@ -198,7 +198,7 @@ vreg_edp_bl: regulator-edp-bl { regulator-min-microvolt = <3600000>; regulator-max-microvolt = <3600000>; - gpio = <&pmc8280c_gpios 6 GPIO_ACTIVE_HIGH>; + gpio = <&pmc8280_2_gpios 6 GPIO_ACTIVE_HIGH>; enable-active-high; pinctrl-0 = <&edp_bl_reg_en>; @@ -1050,6 +1050,11 @@ vol_up_n: vol-up-n-state { }; &pmc8280_2_gpios { + edp_bl_reg_en: edp-bl-reg-en-state { + pins = "gpio6"; + function = "normal"; + }; + wwan_sw_en: wwan-sw-en-state { pins = "gpio1"; function = "normal"; @@ -1061,11 +1066,6 @@ edp_bl_pwm: edp-bl-pwm-state { pins = "gpio8"; function = "func1"; }; - - edp_bl_reg_en: edp-bl-reg-en-state { - pins = "gpio6"; - function = "normal"; - }; }; &pmr735a_gpios { and ... backlight still works! It can also be enabled/disabled with: /sys/class/backlight/backlight/bl_power as expected. I have no clue why both gpio6 on pmc8280_2 and gpio6 on pmc8280c can enable and disable the backlight. Is it a common scenario? Anyway, if I follow my own investigation fully based on the X13s reference and the properties of its backlight enable GPIO, I should switch to pmc8280_2 to use the better match. I will update this patch in v2. Jérôme [1] https://lore.kernel.org/all/20260520165709.E485C1F00893@smtp.kernel.org/