From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754542AbdEQNEb (ORCPT ); Wed, 17 May 2017 09:04:31 -0400 Received: from szxga01-in.huawei.com ([45.249.212.187]:6771 "EHLO szxga01-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753280AbdEQNEa (ORCPT ); Wed, 17 May 2017 09:04:30 -0400 Subject: Re: [PATCH 07/22] scsi: hisi_sas: add the initialisation for pci-based controller To: Arnd Bergmann References: <1495018197-120535-1-git-send-email-john.garry@huawei.com> <1495018197-120535-8-git-send-email-john.garry@huawei.com> CC: "James E.J. Bottomley" , "Martin K. Petersen" , John Garry , , , "Linux Kernel Mailing List" , Xiang Chen From: John Garry Message-ID: Date: Wed, 17 May 2017 14:03:20 +0100 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:45.0) Gecko/20100101 Thunderbird/45.3.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset="utf-8"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.203.181.157] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A090201.591C4A2B.0100,ss=1,re=0.000,recu=0.000,reip=0.000,cl=1,cld=1,fgs=0, ip=0.0.0.0, so=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 1f2162770cf71dd1bfcda5dd32f8216b Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 17/05/2017 13:33, Arnd Bergmann wrote: > On Wed, May 17, 2017 at 12:49 PM, John Garry wrote: >> > Add the code to initialise controller which is based on pci device >> > in hisi_sas_pci_init.c >> > >> > The main functionality added is for probing and initialisation of >> > the controller based on pci device. >> > >> > The core controller routines are still in hisi_sas_main.c; some >> > common initialisation functions and structures are also exported from >> > hisi_sas_main.c for pci init. >> > >> > For platform device-based controller, controller properties - like >> > phy count - were read from the firmware. For pci-based controller this >> > information is hard-coded in the driver, in new struct hisi_sas_pci_hw. >> > > Do you plan to add further PCI based front-ends besides the v3 driver > in the future? If not, you can save one level of indirection here and merge > pci_init.c into the v3 implementation. > > Arnd Hi Arnd, I think for now, any hw revisions will be very closely based on v3. And, for future revisions, the driver has been well abstracted so we can still support any updated features in another version of hisi_sas_hw in v3 driver. I actually kept v3 driver and pci_init.c separate as initially I thought we could merge v2 and v3 driver eventually. But with different functionality, register format, interrupts, I am not 100% confident. Now my only concern is that layout differences between v1/2 and v3 driver, but this is not critical. Anyway, I think we can merge them for now. Cheers, John