From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail.zytor.com (terminus.zytor.com [198.137.202.136]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CA1CF30C17C for ; Sat, 25 Jul 2026 00:26:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.137.202.136 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784939200; cv=none; b=UPTYnr/MYYLOWwdWQf1uQGa2TEl53BJMspR2i2SWUae9E/SND6LE4K6hdaQ4oSAA6UYElyo0jJAFcrc6g1ArZGhbImHgZv9756HZOfBOeASDeDfZ5VhM0Nq0HL106jevrG0wymWm6YMNn2kB/Oju+tz/+U56j2HjorFr0vnCzeI= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784939200; c=relaxed/simple; bh=U3elB7SGCn2MjpR6hMiKb5+AJsGlD34W7ffUgVil/Kk=; h=Message-ID:Date:MIME-Version:Subject:From:To:Cc:References: In-Reply-To:Content-Type; b=tTGlx0yQJQf8YNuB9geiXajbr6fPW1Z+Zqav2rps8cqNf2J6vscHiXAYCtbfx4WnHxpwYALDyk4prIae9bvQ8x8iStzhuBPl0rXF73veKEpn3XuPM96dpiA3th7C/MV2fzSPtNxOw0tzFbdik96y6O4Ut5ba4XLsz4eewliGeAA= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=zytor.com; spf=pass smtp.mailfrom=zytor.com; dkim=pass (2048-bit key) header.d=zytor.com header.i=@zytor.com header.b=oina3z+n; arc=none smtp.client-ip=198.137.202.136 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=zytor.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=zytor.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=zytor.com header.i=@zytor.com header.b="oina3z+n" Received: from [172.27.2.41] (c-76-133-66-138.hsd1.ca.comcast.net [76.133.66.138]) (authenticated bits=0) by mail.zytor.com (8.18.1/8.17.1) with ESMTPSA id 66P0Q0Qj2166700 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NO); Fri, 24 Jul 2026 17:26:01 -0700 DKIM-Filter: OpenDKIM Filter v2.11.0 mail.zytor.com 66P0Q0Qj2166700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=zytor.com; s=2026062701; t=1784939162; bh=P2raLxbCtVSSJuZJ+YGPnRwRiSskOiNWBRTYxU2bOuY=; h=Date:Subject:From:To:Cc:References:In-Reply-To:From; b=oina3z+nAJtWiwAMLXkXL1AGiUWLOBhK1SbkRn6F8w/BALe1IE7tJwX2F4PYTjUCj EiCnAt1G/URk4Pl2VOD0pUjaFxI5Sep43Y5I4D2f9XVUBta8iD8Mldj8jWH0MkerNz 9LguvSlYzTt2Cm1u8af2PujU/RDJ+KmTN1rTPObCSRayGp4vqL9ZSC6GeZlRoqmVkg 4x9Qqx6sZpBGWLwlWzUCPRNEQn7K5bphASDfCtqgsVbl3K8wUjQN2obbpcCYyGG0bP NGuoJRgXqBJD5CAS3cKFcOoQRHsV5uZAmHKqKC7eqAoi/xGN4iQi7Dv0wFhrJqcrgZ T1dir1l2qcLug== Message-ID: Date: Fri, 24 Jul 2026 17:25:21 -0700 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v7 2/5] x86/asm: add volatile, clobbers and zero-length check in inline memcmp From: "H. Peter Anvin" To: Mauricio Faria de Oliveira , Borislav Petkov Cc: Jan Beulich , Thomas Gleixner , Ingo Molnar , Dave Hansen , x86@kernel.org, Juergen Gross , Alexey Dobriyan , Boris Ostrovsky , kernel-dev@igalia.com, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org References: <20260721-pvh-kasan-inline-v7-0-38979a50cef0@igalia.com> <20260721-pvh-kasan-inline-v7-2-38979a50cef0@igalia.com> <20260722170334.GCamD35gwrCng30WH1@fat_crate.local> <0F3A1121-208F-4F71-8C88-BEAE7CB50E75@zytor.com> <4daed8ac-b533-436f-9f86-6d297b87abbb@suse.com> <5e19b195-0ca2-4510-81cb-497b40e4aaf5@zytor.com> <8df0340f0dc7f6c303c6a7da78fad7b8@igalia.com> <7148BD5B-2E06-4137-B361-18AAF329DDC5@zytor.com> <348133f5-8a78-4805-bf0a-b1b08cdc65f2@zytor.com> Content-Language: en-US, sv-SE In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 2026-07-24 16:57, H. Peter Anvin wrote: > > And of course I got the comparison backwards (negative means a < b, thus we > want a - b not b - a). Here is a fixed version. > > int memcmp(const void *a, const void *b, size_t size) > { > int diff; > > asm volatile("xor %0,%0 ;" /* Sets ZF for the size = 0 case */ > "repe cmpsb ;" > "jz 1f ;" /* When size = 0 loading is unsafe */ > "movb -1(%1),%b0 ;" > "movzbl -1(%2),%k2 ;" > "sub %k2,%0 ;" > "1:" > : "=&q" (diff), "+D" (a), "+S" (b), "+c" (size) > : : "memory"); > return diff; > } > For extra credit, this version is even smaller in 16- and 32-bit mode, but larger in 64-bit mode (because it depends on the order of the CMPSB operands, which is the inverse of what the x86-64 ABI expects; swapping the order of "a" and "b" and adding a cmc instruction improves the x86-64 size, but 64 bits is not where the really tight code is...) int memcmp(const void *a, const void *b, size_t size) { int diff; asm volatile("xor %0,%0 ;" "repe cmpsb ;" "jz 1f ;" "sbb %0,%0 ;" "or $1,%0 ;" "1:" : "=&r" (diff), "+S" (a), "+D" (b), "+c" (size) : : "memory"); return diff; }