Re: [PATCH] iommu/amd: Enforce 4k mapping for certain IOMMU data structures

[Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>]

Will,

I have already submitted v2 of this patch. Let me move the discussion there instead ...
(https://lore.kernel.org/linux-iommu/20201105145832.3065-1-suravee.suthikulpanit@amd.com/)

Suravee

On 11/18/20 5:57 AM, Will Deacon wrote:
> On Wed, Oct 28, 2020 at 11:18:24PM +0000, Suravee Suthikulpanit wrote:
>> AMD IOMMU requires 4k-aligned pages for the event log, the PPR log,
>> and the completion wait write-back regions. However, when allocating
>> the pages, they could be part of large mapping (e.g. 2M) page.
>> This causes #PF due to the SNP RMP hardware enforces the check based
>> on the page level for these data structures.
> 
> Please could you include an example backtrace here?
> 
>> So, fix by calling set_memory_4k() on the allocated pages.
> 
> I think I'm missing something here. set_memory_4k() will break the kernel
> linear mapping up into page granular mappings, but the IOMMU isn't using
> that mapping, right? It's just using the physical address returned by
> iommu_virt_to_phys(), so why does it matter?
> 
> Just be nice to capture some of this rationale in the log, especially as
> I'm not familiar with this device.
> 
>> Fixes: commit c69d89aff393 ("iommu/amd: Use 4K page for completion wait write-back semaphore")
> 
> I couldn't figure out how that commit could cause this problem. Please can
> you explain that to me?
> 
> Cheers,
> 
> Will
>