From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932768AbdEVCM2 (ORCPT ); Sun, 21 May 2017 22:12:28 -0400 Received: from mga05.intel.com ([192.55.52.43]:2575 "EHLO mga05.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932542AbdEVCMZ (ORCPT ); Sun, 21 May 2017 22:12:25 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.38,377,1491289200"; d="scan'208";a="1151051554" Subject: Re: [PATCH] perf/x86/intel: Drop kernel samples even though :u is specified From: "Jin, Yao" To: Peter Zijlstra Cc: acme@kernel.org, jolsa@kernel.org, mingo@redhat.com, alexander.shishkin@linux.intel.com, Linux-kernel@vger.kernel.org, ak@linux.intel.com, kan.liang@intel.com, yao.jin@intel.com, Will Deacon , Mark Rutland References: <1495189152-5766-1-git-send-email-yao.jin@linux.intel.com> <20170519092905.yivnfjyhblm5wiap@hirez.programming.kicks-ass.net> <20170519121056.c45jbsfgcdjfuoow@hirez.programming.kicks-ass.net> <20170519123648.p4tkt6xrt5xachuw@hirez.programming.kicks-ass.net> <6d82d33c-df7d-f1ea-979a-5898efe88528@linux.intel.com> Message-ID: Date: Mon, 22 May 2017 10:12:22 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.1.1 MIME-Version: 1.0 In-Reply-To: <6d82d33c-df7d-f1ea-979a-5898efe88528@linux.intel.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Content-Language: en-US Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 5/19/2017 9:33 PM, Jin, Yao wrote: > > > On 5/19/2017 8:36 PM, Peter Zijlstra wrote: >> On Fri, May 19, 2017 at 08:24:19PM +0800, Jin, Yao wrote: >>>> Ah, I was more thinking of something like PERF_PMU_CAP_NO_SKID or >>>> something that would skip the test and preserve current behaviour. >>> OK, I understand now. For example, for PEBS event, its capabilities >>> should >>> be set with PERF_PMU_CAP_NO_SKID. >> Except you cannot in fact do that, since PEBS is the same struct pmu as >> the normal counters (they share counter space after all). >> >> Also, weren't there PEBS errata that would allow this to happen? >> >> But no, more for other architectures to opt out for some reason. But I'm >> thinking we want to start out by unconditionally doing this. It would be >> good to try and Cc most arch pmu maintainers on this though, so they can >> object. >> > I'm thinking v2 of patch will only do simple tasks: > > 1. Define PERF_PMU_CAP_NO_SKID but don't bind it to any event. > > 2. Move the skid checking from x86 specific code to generic code. > Before performing skid checking, test the PERF_PMU_CAP_NO_SKID bit first. > > For binding PERF_PMU_CAP_NO_SKID to event, that may be other arch > related patches. > > Thanks > Jin Yao > > Hi Peter, Maybe it's not very easy to move the skid checking to generic code because we don't have a common kernel_ip() available to determine if ip is a kernel address. I was trying to move kernel_ip() from arch/x86/events/perf_event.h to generic code, but some difficulties I have: For example, in new kernel_ip(), we may use many conditional-compilation for all arch, for example: #ifdef CONFIG_X86_32 return ip > PAGE_OFFSET; #endif #ifdef CONFIG_X86_64 return (long)ip < 0; #endif #ifdef CONFIG_ARM.... ...... #ifdef CONFIG_MIPS.... ...... But the code is being ugly and hard to maintain. And frankly I don't know kernel address space for all arch. Any idea? Could we just do at x86 side this time? Thanks Jin Yao