Re: [PATCH] crypto: caam - adjust RNG timing to support more devices

[Bastian Krause <bst@pengutronix.de>]

On 7/17/23 14:43, Bastian Krause wrote:
> On 6/12/23 10:26, meenakshi.aggarwal@nxp.com wrote:
>> From: Victoria Milhoan <vicki.milhoan@freescale.com>
>>
>> Adjust RNG timing parameters to support more i.MX6 devices.
>>
>> Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
>> Signed-off-by: Dan Douglass <dan.douglass@nxp.com>
>> Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
>> Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
>> ---
>>   drivers/crypto/caam/ctrl.c | 4 ++--
>>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> This patch seems to breaks CAAM RNG instantiation on an i.MX8MM at my end:
> 
> caam 30900000.crypto: Entropy delay = 3200
> caam 30900000.crypto: Entropy delay = 3600
> [...]
> caam 30900000.crypto: Entropy delay = 12400
> caam 30900000.crypto: failed to instantiate RNG
> caam: probe of 30900000.crypto failed with error -11
> 
> If I revert this patch or increase RTSDCTL_ENT_DLY_MAX to a value > 
> 66800, it works again:
> 
> caam 30900000.crypto: Entropy delay = 32800
> caam 30900000.crypto: Entropy delay = 33200
> [...]
> caam 30900000.crypto: Entropy delay = 66800
> caam 30900000.crypto: Instantiated RNG4 SH0
> caam 30900000.crypto: Instantiated RNG4 SH1
> caam 30900000.crypto: device ID = 0x0a16040100000000 (Era 9)
> caam 30900000.crypto: job rings = 2, qi = 0
> caam algorithms registered in /proc/crypto
> caam 30900000.crypto: caam pkc algorithms registered in /proc/crypto
> caam 30900000.crypto: registering rng-caam
> Executing RNG SELF-TEST with wait
> random: crng init done
> caam 30900000.crypto: rng crypto API alg registered prng-caam

This ^ was the kernel log for..


--- a/drivers/crypto/caam/regs.h
+++ b/drivers/crypto/caam/regs.h
@@@ -522,7 -522,7 +522,7 @@@ struct rng4tst
   #define RTSDCTL_ENT_DLY_SHIFT 16
   #define RTSDCTL_ENT_DLY_MASK (0xffff << RTSDCTL_ENT_DLY_SHIFT)
   #define RTSDCTL_ENT_DLY_MIN 3200
--#define RTSDCTL_ENT_DLY_MAX 12800
++#define RTSDCTL_ENT_DLY_MAX 70000
   #define RTSDCTL_SAMP_SIZE_MASK 0xffff
   #define RTSDCTL_SAMP_SIZE_VAL 512
         u32 rtsdctl;            /* seed control register */


For completion's sake: Reverting this patch..


--- a/drivers/crypto/caam/ctrl.c
+++ b/drivers/crypto/caam/ctrl.c
@@ -383,7 +383,7 @@ static void kick_trng(struct device *dev, int ent_delay)
                 /* min. freq. count, equal to 1/4 of the entropy sample length */
                 wr_reg32(&r4tst->rtfrqmin, val >> 2);
                 /* max. freq. count, equal to 16 times the entropy sample length */
-               wr_reg32(&r4tst->rtfrqmax, val << 4);
+               wr_reg32(&r4tst->rtfrqmax, RTFRQMAX_DISABLE);
         }
  
         wr_reg32(&r4tst->rtsdctl, (val << RTSDCTL_ENT_DLY_SHIFT) |


..produces this kernel log (without RNG SELF-TEST):

caam 30900000.crypto: Entropy delay = 3200
caam 30900000.crypto: Entropy delay = 3600
caam 30900000.crypto: Instantiated RNG4 SH0
caam 30900000.crypto: Instantiated RNG4 SH1
caam 30900000.crypto: device ID = 0x0a16040100000000 (Era 9)
caam 30900000.crypto: job rings = 2, qi = 0
caam algorithms registered in /proc/crypto
caam 30900000.crypto: caam pkc algorithms registered in /proc/crypto
caam 30900000.crypto: registering rng-caam
caam 30900000.crypto: rng crypto API alg registered prng-caam
random: crng init done

Regards,
Bastian

>>
>> diff --git a/drivers/crypto/caam/ctrl.c b/drivers/crypto/caam/ctrl.c
>> index 5fed3cf354c0..62dd069942e4 100644
>> --- a/drivers/crypto/caam/ctrl.c
>> +++ b/drivers/crypto/caam/ctrl.c
>> @@ -383,8 +383,8 @@ static void kick_trng(struct device *dev, int 
>> ent_delay)
>>       wr_reg32(&r4tst->rtsdctl, val);
>>       /* min. freq. count, equal to 1/4 of the entropy sample length */
>>       wr_reg32(&r4tst->rtfrqmin, ent_delay >> 2);
>> -    /* disable maximum frequency count */
>> -    wr_reg32(&r4tst->rtfrqmax, RTFRQMAX_DISABLE);
>> +    /* max. freq. count, equal to 16 times the entropy sample length */
>> +    wr_reg32(&r4tst->rtfrqmax, ent_delay << 4);
>>       /* read the control register */
>>       val = rd_reg32(&r4tst->rtmctl);
>>   start_rng:
> 

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