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Fri, 20 Dec 2024 06:43:59 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA02.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 4BK6hwhd022279 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 20 Dec 2024 06:43:58 GMT Received: from [10.253.34.152] (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 19 Dec 2024 22:43:54 -0800 Message-ID: Date: Fri, 20 Dec 2024 14:43:51 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 5/5] arm64: dts: qcom: Update IPQ9574 xo_board_clk to use fixed factor clock To: Konrad Dybcio , Bjorn Andersson , Michael Turquette , "Stephen Boyd" , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Catalin Marinas , Will Deacon , Konrad Dybcio CC: , , , , , , , , , , , References: <20241107-qcom_ipq_cmnpll-v6-0-a5cfe09de485@quicinc.com> <20241107-qcom_ipq_cmnpll-v6-5-a5cfe09de485@quicinc.com> <0776a26e-56cd-4838-9b52-210ae9a1f281@oss.qualcomm.com> <8063460d-18ad-4e54-8232-716bad9d37c3@quicinc.com> <2456ab36-f48e-4aa3-88e1-aeb7895c9816@quicinc.com> Content-Language: en-US From: Jie Luo In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: gY6dZNpW44EhaxGfjAfgtSKNPqoRNL7Y X-Proofpoint-GUID: gY6dZNpW44EhaxGfjAfgtSKNPqoRNL7Y X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 spamscore=0 bulkscore=0 phishscore=0 priorityscore=1501 lowpriorityscore=0 clxscore=1015 mlxscore=0 mlxlogscore=999 adultscore=0 malwarescore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2412200055 On 12/20/2024 5:28 AM, Konrad Dybcio wrote: > On 18.12.2024 12:17 PM, Jie Luo wrote: >> >> >> On 12/13/2024 6:30 PM, Jie Luo wrote: >>> >>> >>> On 12/13/2024 2:33 AM, Konrad Dybcio wrote: >>>> On 7.11.2024 10:50 AM, Luo Jie wrote: >>>>> xo_board_clk is fixed to 24 MHZ, which is routed from WiFi output clock >>>>> 48 MHZ (also being the reference clock of CMN PLL) divided 2 by analog >>>>> block routing channel. >>>>> >>>>> Signed-off-by: Luo Jie >>>>> --- >>>>>   arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi | 7 ++++++- >>>>>   arch/arm64/boot/dts/qcom/ipq9574.dtsi            | 3 ++- >>>>>   2 files changed, 8 insertions(+), 2 deletions(-) >>>>> >>>>> diff --git a/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi b/arch/ arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi >>>>> index 78f6a2e053d5..9a8692377176 100644 >>>>> --- a/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi >>>>> +++ b/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi >>>>> @@ -174,8 +174,13 @@ &ref_48mhz_clk { >>>>>       clock-mult = <1>; >>>>>   }; >>>>> +/* >>>>> + * The frequency of xo_board_clk is fixed to 24 MHZ, which is routed >>>>> + * from WiFi output clock 48 MHZ divided by 2. >>>>> + */ >>>>>   &xo_board_clk { >>>>> -    clock-frequency = <24000000>; >>>>> +    clock-div = <2>; >>>>> +    clock-mult = <1>; >>>>>   }; >>>>>   &xo_clk { >>>>> diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/ dts/qcom/ipq9574.dtsi >>>>> index 8246a00a3e3e..25aed33e9358 100644 >>>>> --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi >>>>> +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi >>>>> @@ -32,7 +32,8 @@ sleep_clk: sleep-clk { >>>>>           }; >>>>>           xo_board_clk: xo-board-clk { >>>>> -            compatible = "fixed-clock"; >>>>> +            compatible = "fixed-factor-clock"; >>>>> +            clocks = <&ref_48mhz_clk>; >>>> >>>> This must be squashed with the previous patch, you can't introduce >>>> code and replace it immediately afterwards. >>>> >>>> Konrad >> >> Hi Konrad, >> >> Looking at this comment again, there may have been some >> misunderstanding. We are not introducing xo_board_clk in patch 4 of this >> series. xo_board_clk is a pre-existing node. >> >> As part of this additional patch 5, we wanted to address Dmitry's >> comment earlier in v5 (reference to comment below), by converting the >> xo_board_clk as well to a fixed-factor clock. So it is better to keep >> this change as a separate patch in my view. Hope this is OK. > > Oh okay.. > > What's the difference between xo_board_clk and xo_clk then, if the > divider is accounted for in xo_board_clk? > > Konrad Here is the clock chain for the relationship between the clocks: xo_clk (48 MHZ or 96 MHZ)-->WiFi (mul/div)--> 48 MHZ-->CMN PLL | +-->fixed factor(div by 2) --> xo_board_clk (24 MHZ) So there are two dividers (fixed factor clocks): first for generating the 48 MHZ clock (ref-48mhz-clk) from the fixed clock source 'xo_clk', and a second for generating the 24 MHZ 'xo_board_clk' from the 48 MHZ ref clock.