Re: [PATCH v3 0/3] Support Perf Extension on AMD KVM guests

["Natarajan, Janakarajan" <Janakarajan.Natarajan@amd.com>]

On 12/8/2017 4:39 PM, Janakarajan Natarajan wrote:
> This patchset adds support for Perf Extension on AMD KVM guests.
>
> When perf runs on a guest with family = 15h || 17h, the MSRs that are
> accessed, when the Perf Extension flag is made available, differ from
> the existing K7 MSRs. The accesses are to the AMD Core Performance
> Extension counters which provide 2 extra counters and new MSRs for both
> the event select and counter registers.
>
> Since the new event select and counter MSRs are interleaved and K7 MSRs
> are contiguous, the logic to map them to the gp_counters[] is changed.
>
> This patchset has been tested with Family 17h and Opteron G1 guests.
>
> v1->v2:
> * Rearranged MSR #defines based on Boris's suggestion.
>
> v2->v3:
> * Changed the logic of mapping MSR to gp_counters[] index based on
>    Boris's feedback.
> * Removed use of family checks based on Radim's feedback.
> * Removed KVM bugfix patch since it is already applied.
>
> Janakarajan Natarajan (3):
>    x86/msr: Add AMD Core Perf Extension MSRs
>    x86/kvm: Add support for AMD Core Perf Extension in guest
>    x86/kvm: Expose AMD Core Perf Extension flag to guests

Are there any concerns regarding this patchset?

>
>   arch/x86/include/asm/msr-index.h |  14 ++++
>   arch/x86/kvm/cpuid.c             |   8 ++-
>   arch/x86/kvm/pmu_amd.c           | 140 +++++++++++++++++++++++++++++++++++----
>   arch/x86/kvm/x86.c               |   1 +
>   4 files changed, 148 insertions(+), 15 deletions(-)
>