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Mon, 25 Sep 2023 11:10:50 GMT Received: from [10.218.47.181] (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.36; Mon, 25 Sep 2023 04:10:44 -0700 Message-ID: Date: Mon, 25 Sep 2023 16:40:41 +0530 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH V2] crypto: qcom-rng - Add hw_random interface support To: Bjorn Andersson CC: , , , , , , , , , , , , , , References: <20230905062420.3983268-1-quic_omprsing@quicinc.com> <20230920030408.3181394-1-quic_omprsing@quicinc.com> <20230922151651.GA437346@hu-bjorande-lv.qualcomm.com> Content-Language: en-US From: Om Prakash Singh In-Reply-To: <20230922151651.GA437346@hu-bjorande-lv.qualcomm.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: E1QCyqpvPv60va_rb2m7NC2b_qLs6i5i X-Proofpoint-GUID: E1QCyqpvPv60va_rb2m7NC2b_qLs6i5i X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-09-25_08,2023-09-25_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 adultscore=0 mlxscore=0 priorityscore=1501 impostorscore=0 bulkscore=0 suspectscore=0 phishscore=0 malwarescore=0 mlxlogscore=999 spamscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2309180000 definitions=main-2309250083 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 9/22/2023 8:46 PM, Bjorn Andersson wrote: > On Wed, Sep 20, 2023 at 08:34:08AM +0530, Om Prakash Singh wrote: >> Add hw_random interface support in qcom-rng driver as new IP block >> in Qualcomm SoC has inbuilt NIST SP800 90B compliant entropic source >> to generate true random number. >> >> Keeping current rng_alg interface as well for random number generation >> using Kernel Crypto API. >> >> Signed-off-by: Om Prakash Singh >> --- >> >> Changes in V2: >> - Updated patch to fix the return value from qcom_rng_generate() to be >> consistent with current implementation > > As far as I can tell you didn't change this, see below. > >> - Updated patch to make it more concise >> - Removed unnecessary use local variable and it's initialization >> - Updated patch to use devm_hwrng_register() instead of hwrng_register() >> - Updated subject line of the patch >> >> This patch is depends on [1] >> [1] https://lore.kernel.org/lkml/20230824-topic-sm8550-rng-v2-4-dfcafbb16a3e@linaro.org/ >> >> drivers/crypto/qcom-rng.c | 65 ++++++++++++++++++++++++++++++++++----- >> 1 file changed, 58 insertions(+), 7 deletions(-) >> >> diff --git a/drivers/crypto/qcom-rng.c b/drivers/crypto/qcom-rng.c >> index fb54b8cfc35f..e5a574a3cc59 100644 >> --- a/drivers/crypto/qcom-rng.c >> +++ b/drivers/crypto/qcom-rng.c >> @@ -7,6 +7,7 @@ >> #include >> #include >> #include >> +#include >> #include >> #include >> #include >> @@ -32,13 +33,18 @@ struct qcom_rng { >> struct mutex lock; >> void __iomem *base; >> struct clk *clk; >> - unsigned int skip_init; >> + struct qcom_rng_of_data *of_data; >> }; >> >> struct qcom_rng_ctx { >> struct qcom_rng *rng; >> }; >> >> +struct qcom_rng_of_data { >> + bool skip_init; >> + bool hwrng_support; >> +}; >> + >> static struct qcom_rng *qcom_rng_dev; >> >> static int qcom_rng_read(struct qcom_rng *rng, u8 *data, unsigned int max) >> @@ -70,7 +76,7 @@ static int qcom_rng_read(struct qcom_rng *rng, u8 *data, unsigned int max) >> } >> } while (currsize < max); >> >> - return 0; >> + return currsize; > > As I pointed out in my previous review, if the qcom_rng_read() is > requested to read a number of bytes (max) that is not evenly divisible > with 4 (WORD_SZ) the loop will exit without accounting for the last > bytes copied... I will update implementation to account currsize for accounting remaining bytes >> } >> >> static int qcom_rng_generate(struct crypto_rng *tfm, >> @@ -92,6 +98,9 @@ static int qcom_rng_generate(struct crypto_rng *tfm, >> mutex_unlock(&rng->lock); >> clk_disable_unprepare(rng->clk); >> >> + if (ret == dlen) > > ...this means that if dlen % 4, you're changing the return value of this > function from 0 to dlen. I will Update logic for success case return value. > >> + ret = 0; >> + >> return ret; >> } >> >> @@ -101,6 +110,13 @@ static int qcom_rng_seed(struct crypto_rng *tfm, const u8 *seed, >> return 0; >> } >> >> +static int qcom_hwrng_read(struct hwrng *rng, void *data, size_t max, bool wait) >> +{ >> + struct qcom_rng *qrng = (struct qcom_rng *)rng->priv; > > You missed Herbert's request in [1], which I presume implies that > qcom_hwrng should be moved into struct qcom_rng, which would mean that > you can get the qrng by container_of(). > > [1] https://lore.kernel.org/lkml/ZQQvlXvGy8p01uJS@gondor.apana.org.au/ I will address this comment is my next patch set V3. >> + >> + return qcom_rng_read(qrng, data, max); >> +} >> + >> static int qcom_rng_enable(struct qcom_rng *rng) >> { >> u32 val; >> @@ -136,7 +152,7 @@ static int qcom_rng_init(struct crypto_tfm *tfm) >> >> ctx->rng = qcom_rng_dev; >> >> - if (!ctx->rng->skip_init) >> + if (!ctx->rng->of_data->skip_init) >> return qcom_rng_enable(ctx->rng); >> >> return 0; >> @@ -157,6 +173,12 @@ static struct rng_alg qcom_rng_alg = { >> } >> }; >> >> +static struct hwrng qcom_hwrng = { >> + .name = "qcom-hwrng", >> + .read = qcom_hwrng_read, >> + .quality = 1024, >> +}; > > Which would mean not adding this static global variable... > > Regards, > Bjorn