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[83.9.2.151]) by smtp.gmail.com with ESMTPSA id g16-20020a2eb5d0000000b002935354161bsm1161590ljn.106.2023.02.23.02.28.00 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 23 Feb 2023 02:28:01 -0800 (PST) Message-ID: Date: Thu, 23 Feb 2023 11:27:59 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.8.0 Subject: Re: [PATCH v2 3/6] drm/msm/a2xx: Implement .gpu_busy To: Dmitry Baryshkov Cc: Rob Clark , Abhinav Kumar , Sean Paul , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org References: <20230223-topic-opp-v2-0-24ed24cd7358@linaro.org> <20230223-topic-opp-v2-3-24ed24cd7358@linaro.org> Content-Language: en-US From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 23.02.2023 03:09, Dmitry Baryshkov wrote: > On Thu, 23 Feb 2023 at 03:47, Konrad Dybcio wrote: >> >> Implement gpu_busy based on the downstream msm-3.4 code [1]. This >> allows us to use devfreq on this old old old hardware! >> >> [1] https://github.com/LineageOS/android_kernel_sony_apq8064/blob/lineage-16.0/drivers/gpu/msm/adreno_a2xx.c#L1975 >> >> Signed-off-by: Konrad Dybcio > > Reviewed-by: Dmitry Baryshkov > > Small nit below > >> --- >> drivers/gpu/drm/msm/adreno/a2xx_gpu.c | 24 ++++++++++++++++++++++++ >> 1 file changed, 24 insertions(+) >> >> diff --git a/drivers/gpu/drm/msm/adreno/a2xx_gpu.c b/drivers/gpu/drm/msm/adreno/a2xx_gpu.c >> index c67089a7ebc1..6f9876b37db5 100644 >> --- a/drivers/gpu/drm/msm/adreno/a2xx_gpu.c >> +++ b/drivers/gpu/drm/msm/adreno/a2xx_gpu.c >> @@ -481,6 +481,29 @@ a2xx_create_address_space(struct msm_gpu *gpu, struct platform_device *pdev) >> return aspace; >> } >> >> +/* While the precise size of this field is unknown, it holds at least these three values.. */ >> +static u64 a2xx_gpu_busy(struct msm_gpu *gpu, unsigned long *out_sample_rate) >> +{ >> + u64 busy_cycles; >> + >> + /* Freeze the counter */ >> + gpu_write(gpu, REG_A2XX_CP_PERFMON_CNTL, PERF_STATE_FREEZE); >> + >> + busy_cycles = gpu_read64(gpu, REG_A2XX_RBBM_PERFCOUNTER1_LO); >> + >> + /* Reset the counter */ >> + gpu_write(gpu, REG_A2XX_CP_PERFMON_CNTL, PERF_STATE_RESET); >> + >> + /* Re-enable the performance monitors */ >> + gpu_rmw(gpu, REG_A2XX_RBBM_PM_OVERRIDE2, BIT(6), BIT(6)); > > It's DEBUG_PERF_SCLK_PM_OVERRIDE > > See https://github.com/genesi/linux-legacy/blob/master/drivers/mxc/amd-gpu/include/reg/yamato/10/yamato_mask.h#L4428 I'll fix it up! Konrad > >> + gpu_write(gpu, REG_A2XX_RBBM_PERFCOUNTER1_SELECT, 1); >> + gpu_write(gpu, REG_A2XX_CP_PERFMON_CNTL, PERF_STATE_ENABLE); >> + >> + *out_sample_rate = clk_get_rate(gpu->core_clk); >> + >> + return busy_cycles; >> +} >> + >> static u32 a2xx_get_rptr(struct msm_gpu *gpu, struct msm_ringbuffer *ring) >> { >> ring->memptrs->rptr = gpu_read(gpu, REG_AXXX_CP_RB_RPTR); >> @@ -502,6 +525,7 @@ static const struct adreno_gpu_funcs funcs = { >> #if defined(CONFIG_DEBUG_FS) || defined(CONFIG_DEV_COREDUMP) >> .show = adreno_show, >> #endif >> + .gpu_busy = a2xx_gpu_busy, >> .gpu_state_get = a2xx_gpu_state_get, >> .gpu_state_put = adreno_gpu_state_put, >> .create_address_space = a2xx_create_address_space, >> >> -- >> 2.39.2 >> > >