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client-ip=165.204.84.17; helo=satlexmb07.amd.com; pr=C Received: from satlexmb07.amd.com (165.204.84.17) by MN1PEPF0000F0E5.mail.protection.outlook.com (10.167.242.43) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9182.15 via Frontend Transport; Fri, 3 Oct 2025 20:12:09 +0000 Received: from [10.254.54.138] (10.180.168.240) by satlexmb07.amd.com (10.181.42.216) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.17; Fri, 3 Oct 2025 13:12:06 -0700 Message-ID: Date: Fri, 3 Oct 2025 15:12:05 -0500 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird From: "Cheatham, Benjamin" Subject: Re: [PATCH v12 25/25] CXL/PCI: Disable CXL protocol error interrupts during CXL Port cleanup To: Terry Bowman CC: , , , , , , , , , , , , , , , , , , References: <20250925223440.3539069-1-terry.bowman@amd.com> <20250925223440.3539069-26-terry.bowman@amd.com> Content-Language: en-US In-Reply-To: <20250925223440.3539069-26-terry.bowman@amd.com> Content-Type: text/plain; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Oct 2025 20:12:09.9944 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 003093ed-8b75-434a-8318-08de02b92245 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000F0E5.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA0PR12MB4430 On 9/25/2025 5:34 PM, Terry Bowman wrote: > During CXL device cleanup the CXL PCIe Port device interrupts remain > enabled. This potentially allows unnecessary interrupt processing on > behalf of the CXL errors while the device is destroyed. > > Disable CXL protocol errors by setting the CXL devices' AER mask register. > > Introduce pci_aer_mask_internal_errors() similar to pci_aer_unmask_internal_errors(). > Add to the AER service driver allowing other subsystems to use. > > Introduce cxl_mask_proto_interrupts() to call pci_aer_mask_internal_errors(). > Add calls to cxl_mask_proto_interrupts() within CXL Port teardown for CXL > Root Ports, CXL Downstream Switch Ports, CXL Upstream Switch Ports, and CXL > Endpoints. Follow the same "bottom-up" approach used during CXL Port > teardown. > > Signed-off-by: Terry Bowman > Reviewed-by: Dave Jiang > Reviewed-by: Jonathan Cameron > > --- > > Changes in v11->v12: > - Keep pci_aer_mask_internal_errors() in driver/pci/pcie/aer.c (Lukas) > - Update commit description for pci_aer_mask_internal_errors() > - Add check `if (port->parent_dport)` in delete_switch_port() (Terry) > > Changes in v10->v11: > - Removed guard() cxl_mask_proto_interrupts(). RP was blocking during > testing. (Terry) > --- > drivers/cxl/core/core.h | 2 ++ > drivers/cxl/core/port.c | 10 +++++++++- > drivers/cxl/core/ras.c | 7 +++++++ > drivers/pci/pcie/aer.c | 21 +++++++++++++++++++++ > include/linux/aer.h | 2 ++ > 5 files changed, 41 insertions(+), 1 deletion(-) > > diff --git a/drivers/cxl/core/core.h b/drivers/cxl/core/core.h > index 3197a71bf7b8..db318a81034a 100644 > --- a/drivers/cxl/core/core.h > +++ b/drivers/cxl/core/core.h > @@ -158,6 +158,7 @@ void cxl_cor_error_detected(struct device *dev); > pci_ers_result_t cxl_error_detected(struct device *dev); > void cxl_port_cor_error_detected(struct device *dev); > pci_ers_result_t cxl_port_error_detected(struct device *dev); > +void cxl_mask_proto_interrupts(struct device *dev); > #else > static inline int cxl_ras_init(void) > { > @@ -187,6 +188,7 @@ static inline pci_ers_result_t cxl_port_error_detected(struct device *dev) > { > return PCI_ERS_RESULT_NONE; > } > +static inline void cxl_mask_proto_interrupts(struct device *dev) { } > #endif // CONFIG_CXL_RAS > > int cxl_gpf_port_setup(struct cxl_dport *dport); > diff --git a/drivers/cxl/core/port.c b/drivers/cxl/core/port.c > index f34a44abb2c9..337a165e8dcd 100644 > --- a/drivers/cxl/core/port.c > +++ b/drivers/cxl/core/port.c > @@ -1434,6 +1434,10 @@ EXPORT_SYMBOL_NS_GPL(cxl_endpoint_autoremove, "CXL"); > */ > static void delete_switch_port(struct cxl_port *port) > { > + cxl_mask_proto_interrupts(port->uport_dev); > + if (port->parent_dport) > + cxl_mask_proto_interrupts(port->parent_dport->dport_dev); > + > devm_release_action(port->dev.parent, cxl_unlink_parent_dport, port); > devm_release_action(port->dev.parent, cxl_unlink_uport, port); > devm_release_action(port->dev.parent, unregister_port, port); > @@ -1455,8 +1459,10 @@ static void del_dports(struct cxl_port *port) > > device_lock_assert(&port->dev); > > - xa_for_each(&port->dports, index, dport) > + xa_for_each(&port->dports, index, dport) { > + cxl_mask_proto_interrupts(dport->dport_dev); Should this call get moved into del_dport()? I think the dports can get deleted as the downstream devices leave, which would skip masking the protocol interrupts on said dports. If that's not the case, then: Reviewed-by: Ben Cheatham > del_dport(dport); > + }