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Fri, 23 Oct 2026 02:37:12 -0700 (PDT) Received: from [10.239.96.176] ([114.94.8.21]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-8a2c8dfb7e8sm538052b3a.36.2026.10.23.02.37.07 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 23 Oct 2026 02:37:12 -0700 (PDT) Message-ID: Date: Fri, 23 Oct 2026 17:37:05 +0800 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v21 14/14] arm64: dts: qcom: kaanapali-mtp-camera-s5kjn5: Add DT overlay To: Konrad Dybcio , Bryan O'Donoghue , Vinod Koul , Neil Armstrong , Manivannan Sadhasivam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bryan O'Donoghue , Vladimir Zapolskiy , Loic Poulain , Mauro Carvalho Chehab , Bjorn Andersson , Konrad Dybcio , Abel Vesa Cc: linux-phy@lists.infradead.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, jeyaprakash.soundrapandian@oss.qualcomm.com, Vijay Kumar Tumati References: <20261011-kaanapali-camss-v21-0-04fd28d815c6@oss.qualcomm.com> <20261011-kaanapali-camss-v21-14-04fd28d815c6@oss.qualcomm.com> <92bb95d5-946e-4169-8382-487ed9ed2254@oss.qualcomm.com> Content-Language: en-US From: Hangxiang Ma In-Reply-To: <92bb95d5-946e-4169-8382-487ed9ed2254@oss.qualcomm.com> Content-Type: text/plain; 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This >> DTBO enables S5KJN5 on CCI-0 interface connected to the CSIPHY2 in four >> lane mode on a rework camera module. >> >> Signed-off-by: Hangxiang Ma >> --- > > [...] > >> +&camss_csiphy2_in_port { >> + camss_csiphy2_inep: endpoint { >> + data-lanes = <1 2 3 4>; >> + remote-endpoint = <&csiphy2_out_ep>; >> + }; >> +}; > > Please define the endpoint in the SoC DTSI like the glymur submission: > > https://lore.kernel.org/linux-arm-msm/b5734dac-1285-452b-8107-9164e6a3e5fa@oss.qualcomm.com/T/#m55a2d04f3fe573dbbc86fe89a874514494eca345 > > [...] > > >> +&csiphy2_in_port { >> + csiphy2_in_ep: endpoint { >> + bus-type = ; >> + clock-lanes = <0>; >> + data-lanes = <1 2 3 4>; >> + remote-endpoint = <&s5kjn5_out_ep>; >> + }; >> +}; >> + >> +&csiphy2_out_port { >> + csiphy2_out_ep: endpoint { >> + remote-endpoint = <&camss_csiphy2_inep>; >> + }; >> +}; > > likewise for these two > > With that: > > Reviewed-by: Konrad Dybcio > > Konrad Hi Konrad, there is one subtle difference between the Glymur and Kaanapali bindings that I'd like to clarify. Kaanapali follows the X1E80100 binding, where data-lanes is required. Therefore, the endpoints need to be defined in the board DTS, following the same pattern as Bryan's series. Moving these endpoint definitions to the SoC DTSI, as done for Glymur, would cause dtbs_check warnings. Would it be OK to keep the current endpoint definitions for Kaanapali? --- Best Regards, Hangxiang