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Wed, 30 Oct 2024 06:59:34 +0000 (GMT) Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA05.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 49U6xXJo003223 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 30 Oct 2024 06:59:33 GMT Received: from [10.216.48.13] (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Tue, 29 Oct 2024 23:59:28 -0700 Message-ID: Date: Wed, 30 Oct 2024 12:29:17 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/6] dt-bindings: clock: qcom: Add GPU clocks for QCS8300 To: Krzysztof Kozlowski CC: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Ajit Pandey , Taniya Das , Jagadeesh Kona , "Satya Priya Kakitapalli" , , , , References: <20241024-qcs8300-mm-patches-v2-0-76c905060d0a@quicinc.com> <20241024-qcs8300-mm-patches-v2-1-76c905060d0a@quicinc.com> <0487791a-f31b-4427-b13b-b7ab6a80378b@quicinc.com> <9bd4c63b-7c68-4e40-9995-9d569eed15b5@kernel.org> Content-Language: en-US From: Imran Shaik In-Reply-To: <9bd4c63b-7c68-4e40-9995-9d569eed15b5@kernel.org> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: k1kK1gxglV9b29xdG4fiIjcCcTKNzPeP X-Proofpoint-GUID: k1kK1gxglV9b29xdG4fiIjcCcTKNzPeP X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 bulkscore=0 adultscore=0 clxscore=1011 impostorscore=0 malwarescore=0 priorityscore=1501 phishscore=0 mlxscore=0 suspectscore=0 mlxlogscore=554 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2410300053 On 10/29/2024 3:06 PM, Krzysztof Kozlowski wrote: > On 29/10/2024 10:23, Imran Shaik wrote: >> >> >> On 10/28/2024 12:35 PM, Krzysztof Kozlowski wrote: >>> On 28/10/2024 06:15, Imran Shaik wrote: >>>> >>>> >>>> On 10/26/2024 5:50 PM, Krzysztof Kozlowski wrote: >>>>> On Thu, Oct 24, 2024 at 07:01:14PM +0530, Imran Shaik wrote: >>>>>> The QCS8300 GPU clock controller is mostly identical to SA8775P, but >>>>>> QCS8300 has few additional clocks and minor differences. Hence, reuse >>>>>> SA8775P gpucc bindings and add additional clocks required for QCS8300. >>>>> >>>>> IIUC, these clocks are not valid for SA8775p. How do we deal with such >>>>> cases for other Qualcomm SoCs? >>>>> >>>> >>>> These newly added clocks are not applicable to SA8755P. In the >>>> gpucc-sa8775p driver, these clocks are marked to NULL for the SA8755P, >>>> ensuring they are not registered to the CCF. >>> >>> I meant bindings. And existing practice. >>> >> >> In the bindings, the same approach is followed in other Qualcomm SoCs as >> well, where additional clocks are added to the existing identical SoC’s >> bindings. >> >> https://lore.kernel.org/r/20240818204348.197788-2-danila@jiaxyga.com > > Exactly, defines are very different, so no, it is not the same approach. > I believe the QCS8300 approach is same as that of SM8475. In the SM8475 SoC, GPLL2 and GPLL3 are the additional clock bindings compared to the SM8450. Similarly, in the QCS8300, the GPU_CC_*_ACCU_SHIFT_CLK clock bindings are additional to the SA8775P. We are also following this approach across all SoCs in the downstream msm-kernel as well. Please let me know if I am missing anything here. Thanks, Imran > Best regards, > Krzysztof >