Re: [PATCH v5 11/14] dt-bindings: media: mediatek: vcodec: add decoder dt-bindings for mt8196

["Kyrie Wu (吴晗)" <Kyrie.Wu@mediatek.com>]

On Thu, 2026-07-02 at 19:55 +0100, Conor Dooley wrote:
> On Thu, Jul 02, 2026 at 05:39:24AM +0000, Kyrie Wu (吴晗) wrote:
> > On Wed, 2026-06-03 at 17:14 +0100, Conor Dooley wrote:
> > > On Wed, Jun 03, 2026 at 04:40:41PM +0800, Kyrie Wu wrote:
> > > > From: Yunfei Dong <yunfei.dong@mediatek.com>
> > > > 
> > > > The MT8196 decoder differs from previous generations in several
> > > > key aspects, most notably in its use of VCP instead of SCP.
> > > > Additionally, the MT8196 enhances codec capabilities by
> > > > supporting
> > > > HEVC Main10 profile decoding. To accommodate these hardware
> > > > changes,
> > > > the binding constraints specify a total of 12 clock inputs,
> > > > consisting of 9 decoder clocks and 3 VCP interface clocks,
> > > > along with 2 power domains covering both the decoder and VCP
> > > > subsystems.
> > > 
> > > I'm pretty pretty confused by this statement about constraints,
> > > since
> > > there's none added?
> > > The vcodec-dec node doesn't even seem to permit clocks at all?
> > > 
> > Dear Conor,
> > 
> > I apologize for any confusion my commit message caused. What I
> > wanted
> > to convey was the hardware differences between the MT8196 and
> > previous
> > ICs. If you feel that the VCP and clock information are not
> > suitable
> > for this location, I would like to rewrite the commit message as
> > follows:
> > Compared to previous ICs, the MT8196 supports a 10-bit decoder and
> > has
> > a decoding capability of 4K@120fps, using a dual hardware decoding
> > architecture of LAT+CORE.
> 
> Sure? But your comments about the constraints are odd and I do not
> know
> if that means you omitted changing constraints when you should have?
> For example, using lat+core only permits you 10 input clocks but your
> commit message talks about 12.
> 

Dear Conor,

I apologize for any confusion my commit message caused. What I wanted
to convey was the hardware differences between the MT8196 and previous
ICs. I would like to rewrite the commit message as follows:
Compared to previous ICs, the MT8196 supports a 10-bit decoder and has
a decoding capability of 4K@120fps, also supports 36-bit DRAM IOVA
address and Video Power Control to optimize bandwidth and voltage
usage.

I will update the commit message accordingly in the next revision.

Thanks a lot.

Regards,
Kyrie

> > 
> > Thanks.
> > 
> > Regards,
> > Kyrie.
> > > > 
> > > > Signed-off-by: Yunfei Dong <yunfei.dong@mediatek.com>
> > > > Acked-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
> > > > ---
> > > >  .../bindings/media/mediatek,vcodec-subdev-
> > > > decoder.yaml           | 
> > > > 1 +
> > > >  1 file changed, 1 insertion(+)
> > > > 
> > > > diff --git
> > > > a/Documentation/devicetree/bindings/media/mediatek,vcodec-
> > > > subdev-
> > > > decoder.yaml
> > > > b/Documentation/devicetree/bindings/media/mediatek,vcodec-
> > > > subdev-
> > > > decoder.yaml
> > > > index bf8082d87ac0..74e1d88d3056 100644
> > > > --- a/Documentation/devicetree/bindings/media/mediatek,vcodec-
> > > > subdev-decoder.yaml
> > > > +++ b/Documentation/devicetree/bindings/media/mediatek,vcodec-
> > > > subdev-decoder.yaml
> > > > @@ -76,6 +76,7 @@ properties:
> > > >        - mediatek,mt8186-vcodec-dec
> > > >        - mediatek,mt8188-vcodec-dec
> > > >        - mediatek,mt8195-vcodec-dec
> > > > +      - mediatek,mt8196-vcodec-dec
> > > >  
> > > >    reg:
> > > >      minItems: 1
> > > > -- 
> > > > 2.45.2
> > > >