Re: [PATCH] gpu: drm/panel: Optimize the workflow of s6d7aa0_lock

[Neil Armstrong <neil.armstrong@linaro.org>]

Hi,

On 31/05/2023 13:07, Lu Hongfei wrote:
> This patch optimized s6d7aa0_lock's workflow.
> Once mipi_dsi_dcs_write_seq failed, s6d7aa0_lock return immediately
> and no further actions will be taken.
> 
> Fixes: 6810bb390282 ("drm/panel: Add Samsung S6D7AA0 panel controller driver")
> 
> Signed-off-by: Lu Hongfei <luhongfei@vivo.com>
> ---
>   drivers/gpu/drm/panel/panel-samsung-s6d7aa0.c | 30 ++++++++++++++-----
>   1 file changed, 22 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/panel/panel-samsung-s6d7aa0.c b/drivers/gpu/drm/panel/panel-samsung-s6d7aa0.c
> index 102e1fc7ee38..f98df32d1c55
> --- a/drivers/gpu/drm/panel/panel-samsung-s6d7aa0.c
> +++ b/drivers/gpu/drm/panel/panel-samsung-s6d7aa0.c
> @@ -69,15 +69,29 @@ static int s6d7aa0_lock(struct s6d7aa0 *ctx, bool lock)
>   	int ret = 0;
>   
>   	if (lock) {
> -		mipi_dsi_dcs_write_seq(dsi, MCS_PASSWD1, 0xa5, 0xa5);
> -		mipi_dsi_dcs_write_seq(dsi, MCS_PASSWD2, 0xa5, 0xa5);
> -		if (ctx->desc->use_passwd3)
> -			mipi_dsi_dcs_write_seq(dsi, MCS_PASSWD3, 0x5a, 0x5a);
> +		ret = mipi_dsi_dcs_write_seq(dsi, MCS_PASSWD1, 0xa5, 0xa5);
> +		if (ret < 0)
> +			return ret;

mipi_dsi_dcs_write_seq() is a macro that already calls "return ret" on error,
so this is wrong, and there's nothing wrong with the currently upstream driver.

Neil

> +		ret = mipi_dsi_dcs_write_seq(dsi, MCS_PASSWD2, 0xa5, 0xa5);
> +		if (ret < 0)
> +			return ret;
> +		if (ctx->desc->use_passwd3) {
> +			ret = mipi_dsi_dcs_write_seq(dsi, MCS_PASSWD3, 0x5a, 0x5a);
> +			if (ret < 0)
> +				return ret;
> +		}
>   	} else {
> -		mipi_dsi_dcs_write_seq(dsi, MCS_PASSWD1, 0x5a, 0x5a);
> -		mipi_dsi_dcs_write_seq(dsi, MCS_PASSWD2, 0x5a, 0x5a);
> -		if (ctx->desc->use_passwd3)
> -			mipi_dsi_dcs_write_seq(dsi, MCS_PASSWD3, 0xa5, 0xa5);
> +		ret = mipi_dsi_dcs_write_seq(dsi, MCS_PASSWD1, 0x5a, 0x5a);
> +		if (ret < 0)
> +			return ret;
> +		ret = mipi_dsi_dcs_write_seq(dsi, MCS_PASSWD2, 0x5a, 0x5a);
> +		if (ret < 0)
> +			return ret;
> +		if (ctx->desc->use_passwd3) {
> +			ret = mipi_dsi_dcs_write_seq(dsi, MCS_PASSWD3, 0xa5, 0xa5);
> +			if (ret < 0)
> +				return ret;
> +		}
>   	}
>   
>   	return ret;