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From: Paul Burton <paul.burton@imgtec.com>
To: Rob Herring <robh@kernel.org>
Cc: <linux-mips@linux-mips.org>, Ralf Baechle <ralf@linux-mips.org>,
	<devicetree@vger.kernel.org>, Mark Rutland <mark.rutland@arm.com>,
	<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 11/26] dt-bindings: Document mti,mips-cpc binding
Date: Fri, 2 Sep 2016 14:59:20 +0100	[thread overview]
Message-ID: <f827cd3c-9547-ae44-51bf-ea574a7fa136@imgtec.com> (raw)
In-Reply-To: <20160902123419.GA31627@rob-hp-laptop>

On 02/09/16 13:34, Rob Herring wrote:
> On Fri, Aug 26, 2016 at 04:37:10PM +0100, Paul Burton wrote:
>> Document a binding for the MIPS Cluster Power Controller (CPC) which
>> simply allows the device tree to specify where the CPC registers should
>> be mapped.
>>
>> Signed-off-by: Paul Burton <paul.burton@imgtec.com>
>> ---
>>
>>  Documentation/devicetree/bindings/misc/mti,mips-cpc.txt | 8 ++++++++
> 
> This is for power domains, right? Move to bindings/power.

Hi Rob,

Well, sort of. The CPC controls the power domains for CPU cores & the
MIPS Coherency Manager within a CPU cluster. That is, it's the block of
hardware that we send commands to power up or down CPUs to. It's not
something that makes use of the kernel's power domain infrastructure,
it's essentially only involved in SMP startup, hotplug or cpuidle low
power states.

This binding is purely about assigning some address space for the CPC
register interface, which can be mapped anywhere at runtime. Besides
knowing where to place the registers there's currently nothing else we'd
need to describe in DT.

If you still think bindings/power/ is the best place for it given that,
I'll move it.

> 
>>  1 file changed, 8 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/misc/mti,mips-cpc.txt
>>
>> diff --git a/Documentation/devicetree/bindings/misc/mti,mips-cpc.txt b/Documentation/devicetree/bindings/misc/mti,mips-cpc.txt
>> new file mode 100644
>> index 0000000..92eb08f
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/misc/mti,mips-cpc.txt
>> @@ -0,0 +1,8 @@
>> +Binding for MIPS Cluster Power Controller (CPC).
>> +
>> +This binding allows a system to specify where the CPC registers should be
>> +mapped using device tree.
>> +
>> +Required properties:
>> +compatible : Should be "mti,mips-cpc".
>> +regs: Should describe the address & size of the CPC register region.
> 
> Also needs #power-domain-cells property.

As above, this doesn't make use of power domain infrastructure or
anything like it so I don't think that's correct.

Thanks,
    Paul

> 
>> -- 
>> 2.9.3
>>

  reply	other threads:[~2016-09-02 13:59 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-08-26 15:36 [PATCH 00/26] MIPS generic kernels, SEAD-3 & Boston support Paul Burton
2016-08-26 15:37 ` [PATCH 01/26] MIPS: PCI: Support for CONFIG_PCI_DOMAINS_GENERIC Paul Burton
2016-08-26 15:37 ` [PATCH 02/26] MIPS: PCI: Make pcibios_set_cache_line_size an initcall Paul Burton
2016-08-26 15:37 ` [PATCH 03/26] MIPS: PCI: Inline pcibios_assign_all_busses Paul Burton
2016-08-26 15:37 ` [PATCH 04/26] MIPS: PCI: Split pci.c into pci.c & pci-legacy.c Paul Burton
2016-08-26 15:37 ` [PATCH 05/26] MIPS: PCI: Introduce CONFIG_PCI_DRIVERS_LEGACY Paul Burton
2016-08-26 15:37 ` [PATCH 06/26] MIPS: PCI: Support generic drivers Paul Burton
2016-08-26 15:37 ` [PATCH 07/26] MIPS: Sanitise coherentio semantics Paul Burton
2016-08-26 15:37 ` [PATCH 08/26] MIPS: dma-default: Don't check hw_coherentio if device is non-coherent Paul Burton
2016-08-26 15:37 ` [PATCH 09/26] MIPS: Support per-device DMA coherence Paul Burton
2016-08-26 15:37 ` [PATCH 10/26] MIPS: Print CM error reports upon bus errors Paul Burton
2016-08-26 15:37 ` [PATCH 11/26] dt-bindings: Document mti,mips-cpc binding Paul Burton
2016-09-02 12:34   ` Rob Herring
2016-09-02 13:59     ` Paul Burton [this message]
2016-08-26 15:37 ` [PATCH 12/26] MIPS: CPC: Provide a default mips_cpc_default_phys_base Paul Burton
2016-08-26 15:37 ` [PATCH 13/26] dt-bindings: Document mti,mips-cdmm binding Paul Burton
2016-09-02 12:38   ` Rob Herring
2016-08-26 15:37 ` [PATCH 14/26] MIPS: CDMM: Allow CDMM base address to be specified via DT Paul Burton
2016-08-26 15:37 ` [PATCH 15/26] irqchip: mips-cpu: Replace magic 0x100 with IE_SW0 Paul Burton
2016-08-26 15:37 ` [PATCH 16/26] irqchip: mips-cpu: Prepare for non-legacy IRQ domains Paul Burton
2016-08-26 15:37 ` [PATCH 17/26] irqchip: mips-cpu: Introduce IPI IRQ domain support Paul Burton
2016-08-26 15:37 ` [PATCH 18/26] MIPS: smp-mt: Use CPU interrupt controller " Paul Burton
2016-08-26 15:37 ` [PATCH 19/26] MIPS: Stengthen IPI IRQ domain sanity check Paul Burton
2016-08-26 15:37 ` [PATCH 20/26] MIPS: Adjust MIPS64 CAC_BASE to reflect Config.K0 Paul Burton
2016-08-26 15:37 ` [PATCH 21/26] MIPS: Support generating Flattened Image Trees (.itb) Paul Burton
2016-08-26 15:37 ` [PATCH 22/26] MIPS: generic: Introduce generic DT-based board support Paul Burton
2017-11-19  3:43   ` [22/26] " Guenter Roeck
2017-11-20 10:25     ` James Hogan
2017-11-20 14:03       ` Guenter Roeck
2017-11-21  0:02         ` [PATCH] MIPS: Fix CPS SMP NS16550 UART defaults James Hogan
2017-11-21  3:32           ` Guenter Roeck
2017-12-25 17:43           ` Guenter Roeck
2016-08-26 15:37 ` [PATCH 23/26] MIPS: generic: Convert SEAD-3 to a generic board Paul Burton
2016-08-26 15:37 ` [PATCH 24/26] dt-bindings: Document img,boston-clock binding Paul Burton
2016-08-26 17:44   ` Stephen Boyd
2016-08-30 15:53     ` Paul Burton
2016-09-02 12:54       ` Rob Herring
2016-09-02 13:33         ` Paul Burton
2016-08-26 15:37 ` [PATCH 25/26] clk: boston: Add a driver for MIPS Boston board clocks Paul Burton
2016-08-26 17:41   ` Stephen Boyd
2016-08-30 15:06     ` Paul Burton
2016-08-26 15:37 ` [PATCH 26/26] MIPS: generic: Support MIPS Boston development boards Paul Burton

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