Re: [PATCH v4 22/34] Revert "arm64: dts: ti: k3-j721e-beagleboneai64: Fix reversed C6x carveout locations"

[Andrew Davis <afd@ti.com>]

On 9/8/25 9:28 AM, Beleswar Padhi wrote:
> This reverts commit 1a314099b7559690fe23cdf3300dfff6e830ecb1.
> 
> The C6x carveouts are reversed intentionally. This is due to the
> requirement to keep the DMA memory region as non-cached, however the
> minimum granular cache region for C6x is 16MB. So, C66x_0 marks the
> entire C66x_1 16MB memory carveouts as non-cached, and uses the DMA
> memory region of C66x_1 as its own, and vice-versa.
> 
> This was also called out in the original commit which introduced these
> reversed carveouts:
> 	"The minimum granularity on the Cache settings on C66x DSP
> 	cores is 16MB, so the DMA memory regions are chosen such that
> 	they are in separate 16MB regions for each DSP, while reserving
> 	a total of 16 MB for each DSP and not changing the overall DSP
>          remoteproc carveouts."
> 
> Fixes: 1a314099b755 ("arm64: dts: ti: k3-j721e-beagleboneai64: Fix reversed C6x carveout locations")
> Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
> ---

Acked-by: Andrew Davis <afd@ti.com>

> v4: Changelog:
> 1. Updaed node names to 'memory@addr'
> 
> Link to v3:
> https://lore.kernel.org/all/20250905051846.1189612-22-b-padhi@ti.com/
> 
> v3: Changelog:
> 1. None
> 
> Link to v2:
> https://lore.kernel.org/all/20250823160901.2177841-22-b-padhi@ti.com/
> 
> v2: Changelog:
> 1. Re-ordered patch from [PATCH 04/33] to [PATCH v2 21/33].
> 
> Link to v1:
> https://lore.kernel.org/all/20250814223839.3256046-5-b-padhi@ti.com/
> 
>   arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts | 6 ++++--
>   1 file changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
> index 66c4614f9e42..92f5e4a14a49 100644
> --- a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
> +++ b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
> @@ -123,7 +123,8 @@ main_r5fss1_core1_memory_region: memory@a5100000 {
>   			no-map;
>   		};
>   
> -		c66_0_dma_memory_region: memory@a6000000 {
> +		/* Carveout locations are flipped due to caching */
> +		c66_1_dma_memory_region: memory@a6000000 {
>   			compatible = "shared-dma-pool";
>   			reg = <0x00 0xa6000000 0x00 0x100000>;
>   			no-map;
> @@ -135,7 +136,8 @@ c66_0_memory_region: memory@a6100000 {
>   			no-map;
>   		};
>   
> -		c66_1_dma_memory_region: memory@a7000000 {
> +		/* Carveout locations are flipped due to caching */
> +		c66_0_dma_memory_region: memory@a7000000 {
>   			compatible = "shared-dma-pool";
>   			reg = <0x00 0xa7000000 0x00 0x100000>;
>   			no-map;