From: John Garry <john.garry@huawei.com>
To: Bjorn Helgaas <helgaas@kernel.org>,
"zhichang.yuan" <yuanzhichang@hisilicon.com>
Cc: <catalin.marinas@arm.com>, <will.deacon@arm.com>,
<robh+dt@kernel.org>, <frowand.list@gmail.com>,
<bhelgaas@google.com>, <rafael@kernel.org>,
<mark.rutland@arm.com>, <brian.starkey@arm.com>, <olof@lixom.net>,
<arnd@arndb.de>, <linux-arm-kernel@lists.infradead.org>,
<lorenzo.pieralisi@arm.com>, <benh@kernel.crashing.org>,
<linux-kernel@vger.kernel.org>, <linuxarm@huawei.com>,
<devicetree@vger.kernel.org>, <linux-pci@vger.kernel.org>,
<linux-serial@vger.kernel.org>, <minyard@acm.org>,
<liviu.dudau@arm.com>, <zourongrong@gmail.com>,
<gabriele.paoloni@huawei.com>, <zhichang.yuan02@gmail.com>,
<kantyzc@163.com>, <xuwei5@hisilicon.com>
Subject: Re: [PATCH V6 2/5] PCI: Adapt pci_register_io_range() for indirect-IO and PCI I/O translation
Date: Tue, 31 Jan 2017 13:39:09 +0000 [thread overview]
Message-ID: <f8a6c3ce-ba8e-c00e-8e6f-7c799fb4dd44@huawei.com> (raw)
In-Reply-To: <20170131001030.GB20550@bhelgaas-glaptop.roam.corp.google.com>
On 31/01/2017 00:10, Bjorn Helgaas wrote:
> On Tue, Jan 24, 2017 at 03:05:22PM +0800, zhichang.yuan wrote:
>> After indirect-IO is introduced, system must can assigned indirect-IO devices
>> with logical I/O ranges which are different from those for PCI I/O devices.
>> Otherwise, I/O accessors can't identify whether the I/O port is for memory
>> mapped I/O or indirect-IO.
>
> Maybe:
>
> We must assign logical I/O port space for indirect I/O such that the
> I/O accessors can tell whether a logical I/O port refers to memory-
> mapped I/O space or indirect I/O space.
>
It's better
>> As current helper, pci_register_io_range(), is used for PCI I/O ranges
>> registration and translation, indirect-IO devices should also apply these
>> helpers to manage the I/O ranges. It will be easy to ensure the assigned
>> logical I/O ranges unique.
>> But for indirect-IO devices, there is no cpu address. The current
>> pci_register_io_range() can not work for this case.
>>
>> This patch makes some changes on the pci_register_io_range() to support the
>> I/O range registration with device's fwnode also. After this, the indirect-IO
>> devices can register the device-local I/O range to system logical I/O and
>> easily perform the translation between device-local I/O range and sytem
>> logical I/O range.
>
>> -int __weak pci_register_io_range(phys_addr_t addr, resource_size_t size)
>> +int __weak pci_register_io_range(struct fwnode_handle *node, phys_addr_t addr,
>> + resource_size_t size, unsigned long *port)
>
> Why is this __weak? It looks like it's been __weak since its
> introduction by 41f8bba7f555 ("of/pci: Add pci_register_io_range() and
> pci_pio_to_address()"), but I don't see any other implementations of
> it.
>
> Can you add a patch that does nothing but make this non-weak?
>
OK
>> +#else
>> + /*
>> + * powerpc and microblaze have their own registration,
>> + * just look up the value here
>
> Can you include a pointer to the powerpc and microblaze registration
> code here? It's conceivable that somebody could generalize this
> enough to support powerpc and microblaze as well.
>
It should be no problem
>> --- a/include/linux/pci.h
>> +++ b/include/linux/pci.h
>> @@ -34,6 +34,9 @@
>>
>> #include <linux/pci_ids.h>
>>
>> +/* the macro below flags an invalid cpu address
>> + * and is used by IO special hosts */
>
> s/cpu/CPU/
>
OK
> Use conventional multi-line comment style:
>
> /*
> * IO_RANGE_IOEXT flags an invalid CPU address ...
> */
>
>> +#define IO_RANGE_IOEXT (resource_size_t)(-1ull)
>
> And put this close to related things, e.g., pci_register_io_range(),
> instead of just dropping it in at the top of the file.
OK
>
>> /*
>> * The PCI interface treats multi-function devices as independent
>> * devices. The slot/function address of each device is encoded
>> @@ -1197,8 +1200,8 @@ int __must_check pci_bus_alloc_resource(struct pci_bus *bus,
>> resource_size_t),
>> void *alignf_data);
>>
>> -
>> -int pci_register_io_range(phys_addr_t addr, resource_size_t size);
>> +int pci_register_io_range(struct fwnode_handle *node, phys_addr_t addr,
>> + resource_size_t size, unsigned long *port);
>> unsigned long pci_address_to_pio(phys_addr_t addr);
>> phys_addr_t pci_pio_to_address(unsigned long pio);
>> int pci_remap_iospace(const struct resource *res, phys_addr_t phys_addr);
>> --
>> 1.9.1
>>
Thanks,
John
>
> .
>
next prev parent reply other threads:[~2017-01-31 13:41 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-24 7:05 [PATCH V6 0/5] LPC: legacy ISA I/O support zhichang.yuan
2017-01-24 7:05 ` [PATCH V6 1/5] LIB: Indirect ISA/LPC port IO introduced zhichang.yuan
2017-01-30 17:12 ` Alexander Graf
2017-01-31 13:32 ` John Garry
2017-01-31 19:37 ` Alexander Graf
2017-02-01 12:29 ` Gabriele Paoloni
2017-02-13 14:17 ` zhichang.yuan
2017-02-14 13:17 ` Alexander Graf
2017-02-13 14:05 ` zhichang.yuan
2017-02-14 13:15 ` Alexander Graf
2017-01-31 0:09 ` Bjorn Helgaas
2017-01-31 13:34 ` John Garry
2017-01-24 7:05 ` [PATCH V6 2/5] PCI: Adapt pci_register_io_range() for indirect-IO and PCI I/O translation zhichang.yuan
2017-01-31 0:10 ` Bjorn Helgaas
2017-01-31 13:39 ` John Garry [this message]
2017-01-31 0:15 ` Bjorn Helgaas
2017-02-04 12:59 ` John Garry
2017-02-02 17:36 ` John Garry
2017-02-02 23:00 ` Rafael J. Wysocki
2017-01-24 7:05 ` [PATCH V6 3/5] OF: Add missing I/O range exception for indirect-IO devices zhichang.yuan
2017-01-27 22:03 ` Rob Herring
2017-01-30 8:57 ` John Garry
2017-01-30 10:08 ` Arnd Bergmann
2017-01-24 7:05 ` [PATCH V6 4/5] LPC: Support the device-tree LPC host on Hip06/Hip07 zhichang.yuan
2017-01-27 22:12 ` Rob Herring
2017-01-30 20:08 ` Alexander Graf
2017-01-31 10:07 ` John Garry
2017-01-31 11:03 ` Alexander Graf
2017-01-31 11:49 ` John Garry
2017-01-31 11:51 ` Gabriele Paoloni
2017-02-13 14:39 ` zhichang.yuan
2017-02-14 13:29 ` Alexander Graf
2017-02-15 11:35 ` zhichang.yuan
2017-02-15 11:53 ` Alexander Graf
2017-02-16 8:59 ` zhichang.yuan
2017-01-24 7:05 ` [PATCH V5 5/5] LPC: Add the ACPI LPC support zhichang.yuan
2017-02-04 13:20 ` John Garry
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