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[82.132.234.47]) by smtp.googlemail.com with ESMTPSA id a640c23a62f3a-c5095b6091dsm295722066b.57.2026.11.15.02.02.39 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 15 Nov 2026 02:02:41 -0800 (PST) Message-ID: Date: Sun, 15 Nov 2026 10:02:39 +0000 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 3/3] soundwire: qcom: check clk_prepare_enable() return values To: Daniel Carter , krzk@kernel.org, andersson@kernel.org, broonie@kernel.org, srini@kernel.org, konradybcio@kernel.org Cc: robh@kernel.org, conor+dt@kernel.org, vkoul@kernel.org, tiwai@suse.com, perex@perex.cz, lgirdwood@gmail.com, pierre-louis.bossart@linux.dev, yung-chuan.liao@linux.intel.com, abelvesa@kernel.org, linux-arm-msm@vger.kernel.org, linux-sound@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <2dc9301fc1ec46cdb66dc49a85f721b1@gmail.com> From: Srinivas Kandagatla Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMTE1MDAzOSBTYWx0ZWRfXwazsdqZ99PkS c5Yffp9H611JU4dz/vTQAixzngB6aP623779+3is3vFFe+DanUPfn1vfEJBM1yRwqodZTwcZi2e xFxnkYM/MOqG/IXXqt5xatBVpsh8ebueKz+gb7fYTJ4bRx9FyXgGpGAve4+hDSo7ij1b17SWZLI x2lt3c+fFvwKZ4YgHtgwckoSR52Ge4B4UhjEyqbU9PabGcvPyENvSNprGuSrHVf7XU8EaH2VFIe QznmXzhzM4rAP5DMd7k0v36N/c7fpdcsbUkMCluxjYVTxiRCJjK6UxticobMZcrWC+EwSv/28rb NvQXFQoIsJ+OesDd7dyCgNIxZtYV8vLLRiCMBLa0bQ3Xj51a4FtzJojzXIciNpNaEjqvXRsBkYA ckcBxiXO3lSpb+6p359H/iXVJe5RgWFCzAJe95q9+AtIUn7v9rrwofqYUt+zjkGGJkPTct81LQz ft6eyEuxEht56uPr+8g== X-Proofpoint-ORIG-GUID: ozqyb1P99rnISyH4FYGV2uRJUOvqR_wW X-Proofpoint-GUID: ozqyb1P99rnISyH4FYGV2uRJUOvqR_wW X-Proofpoint-Spam-Info: AW1haW4tMjYxMTE1MDAzOSBTYWx0ZWRfX0NfhssLh1e1u S1RTbyJClrdmIRQr2hCK5uT1YPU19ksgRFUF4Efner/GJE5F20xUm+CzC065c4Sg2DW/cHjzaEc wkXqUJT2AQjKIWfCB4oJ7UV/xJl+aVM= X-Authority-Analysis: v=2.4 cv=X9rHu2Te c=1 sm=1 tr=0 ts=6af98344 cx=c_pps a=HLyN3IcIa5EE8TELMZ618Q==:117 a=AI3hfGQ59aOwaD8qyfpUrw==:17 a=IkcTkHD0fZMA:10 a=zJRp6_cAMcgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=pGLkceISAAAA:8 a=EUspDBNiAAAA:8 a=JloCQWs77Wql-FaIygoA:9 a=QEXdDO2ut3YA:10 a=bTQJ7kPSJx9SKPbeHEYW:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.138,FMLib:17.12.100.49 definitions=2026-11-15_03,2026-11-11_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 impostorscore=0 bulkscore=0 clxscore=1015 priorityscore=1501 adultscore=0 malwarescore=0 lowpriorityscore=0 suspectscore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2611040001 definitions=main-2611150039 On 11/14/26 8:30 AM, Daniel Carter wrote: > clk_prepare_enable() can fail; unchecked, the driver proceeds to > touch registers with the interface clock off, which aborts on arm64. > Check the return value in the interrupt handler (returning IRQ_NONE, > as the interrupt status is not read or cleared on that path), in > probe, and in the runtime resume path (returning the error without > unmasking the level-high wake IRQ, which would storm while the slave > keeps driving the line). > > Fixes: 02efb49aa805 ("soundwire: qcom: add support for SoundWire controller") > Fixes: 74e79da9fd46 ("soundwire: qcom: add runtime pm support") Missing Cc Stable. > Signed-off-by: Daniel Carter Other than that, lgtm Reviewed-by: Srinivas Kandagatla --Srini > --- > drivers/soundwire/qcom.c | 14 +++++++++++--- > 1 file changed, 11 insertions(+), 3 deletions(-) > > diff --git a/drivers/soundwire/qcom.c b/drivers/soundwire/qcom.c > index 6e0c5fb10ef..62a44f64dd8 100644 > --- a/drivers/soundwire/qcom.c > +++ b/drivers/soundwire/qcom.c > @@ -778,7 +778,9 @@ static irqreturn_t qcom_swrm_irq_handler(int irq, void *dev_id) > u32 i; > int devnum; > int ret = IRQ_HANDLED; > - clk_prepare_enable(ctrl->hclk); > + > + if (clk_prepare_enable(ctrl->hclk)) > + return IRQ_NONE; > > ctrl->reg_read(ctrl, ctrl->reg_layout[SWRM_REG_INTERRUPT_STATUS], > &intr_sts); > @@ -1675,7 +1677,11 @@ static int qcom_swrm_probe(struct platform_device *pdev) > goto err_init; > } > > - clk_prepare_enable(ctrl->hclk); > + ret = clk_prepare_enable(ctrl->hclk); > + if (ret) { > + dev_err(dev, "unable to enable iface clock\n"); > + goto err_init; > + } > > ctrl->dev = dev; > dev_set_drvdata(&pdev->dev, ctrl); > @@ -1800,7 +1806,9 @@ static int __maybe_unused swrm_runtime_resume(struct device *dev) > disable_irq_nosync(ctrl->wake_irq); > } > > - clk_prepare_enable(ctrl->hclk); > + ret = clk_prepare_enable(ctrl->hclk); > + if (ret) > + return ret; > > if (ctrl->clock_stop_not_supported) { > reinit_completion(&ctrl->enumeration);