From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: yuanjie yang <yuanjie.yang@oss.qualcomm.com>,
andersson@kernel.org, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, tingwei.zhang@oss.qualcomm.com
Subject: Re: [PATCH v2 1/2] arm64: dts: qcom: talos: switch to interrupt-cells 4 to add PPI partitions
Date: Thu, 8 Jan 2026 15:09:30 +0100 [thread overview]
Message-ID: <f8e2177a-2aeb-43b6-aea7-ca1c571c9928@oss.qualcomm.com> (raw)
In-Reply-To: <d90f592f-6bf7-4b04-98c6-608383652797@kernel.org>
On 1/8/26 2:38 PM, Konrad Dybcio wrote:
>
>
> On 1/8/26 10:25 AM, yuanjie yang wrote:
>> From: Yuanjie Yang <yuanjie.yang@oss.qualcomm.com>
>>
>> The ARM PMUs shares the same per-cpu (PPI) interrupt, so we need to switch
>> to interrupt-cells = <4> in the GIC node to allow adding an interrupt
>> partition map phandle as the 4th cell value for GIC_PPI interrupts.
>>
>> Signed-off-by: Yuanjie Yang <yuanjie.yang@oss.qualcomm.com>
>> ---
>
> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Sorry for the sloppy trailer from the wrong email, let me try once again:
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Konrad
next prev parent reply other threads:[~2026-01-08 14:09 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-08 9:25 [PATCH v2 0/2] arm64: dts: qcom: talos: add PMU yuanjie yang
2026-01-08 9:25 ` [PATCH v2 1/2] arm64: dts: qcom: talos: switch to interrupt-cells 4 to add PPI partitions yuanjie yang
2026-01-08 13:38 ` Konrad Dybcio
2026-01-08 14:09 ` Konrad Dybcio [this message]
2026-01-08 9:25 ` [PATCH v2 2/2] arm64: dts: qcom: talos: Add PMU support yuanjie yang
2026-01-08 13:35 ` Konrad Dybcio
2026-01-10 19:11 ` [PATCH v2 0/2] arm64: dts: qcom: talos: add PMU Bjorn Andersson
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