From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 95C64C433EF for ; Mon, 18 Jun 2018 09:40:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5A41E208A6 for ; Mon, 18 Jun 2018 09:40:04 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5A41E208A6 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S936024AbeFRJkD (ORCPT ); Mon, 18 Jun 2018 05:40:03 -0400 Received: from mga09.intel.com ([134.134.136.24]:61495 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755259AbeFRJj7 (ORCPT ); Mon, 18 Jun 2018 05:39:59 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 18 Jun 2018 02:39:58 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,238,1526367600"; d="scan'208";a="58488512" Received: from songjunw-mobl1.ger.corp.intel.com (HELO [10.226.39.15]) ([10.226.39.15]) by fmsmga002.fm.intel.com with ESMTP; 18 Jun 2018 02:39:54 -0700 Subject: Re: [PATCH 4/7] tty: serial: lantiq: Always use readl()/writel() To: Arnd Bergmann Cc: hua.ma@linux.intel.com, yixin.zhu@linux.intel.com, chuanhua.lei@intel.com, "open list:RALINK MIPS ARCHITECTURE" , qi-ming.wu@intel.com, linux-clk , linux-serial@vger.kernel.org, DTML , James Hogan , Jiri Slaby , Linux Kernel Mailing List , Greg Kroah-Hartman , Ralf Baechle References: <20180612054034.4969-1-songjun.wu@linux.intel.com> <20180612054034.4969-5-songjun.wu@linux.intel.com> From: "Wu, Songjun" Message-ID: Date: Mon, 18 Jun 2018 17:39:53 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.3.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Content-Language: en-US Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 6/14/2018 6:07 PM, Arnd Bergmann wrote: > On Tue, Jun 12, 2018 at 7:40 AM, Songjun Wu wrote: >> Previous implementation uses platform-dependent functions >> ltq_w32()/ltq_r32() to access registers. Those functions are not >> available for other SoC which uses the same IP. >> Change to OS provided readl()/writel() and readb()/writeb(), so >> that different SoCs can use the same driver. >> >> Signed-off-by: Songjun Wu > Are there any big-endian machines using this driver? The original definition > of ltq_r32() uses non-byteswapping __raw_readl() etc, which suggests > that the registers might be wired up in a way that matches the CPU > endianess (this is usally a bad idea in hardware design, but nothing > we can influence in the OS). > > When you change it to readl(), that will breaks all machines that rely > on the old behavior on big-endian kernels. > > Arnd It will not break existing big-endian SoC as SWAP_IO_SPACE is disabled. Disable SWAP_IO_SPACE will not impact ltq_r32 as it uses non-byte swapping __raw_readl() and it makes readl work in big-endian kernel too. The old Lantiq platform enable SWAP_IO_SPACE to support PCI as it's a little-endian bus plus PCI TX/RX swap enable impacted both data and control path. Alternatively PCI device driver has to do endian swap, It is better to let PCI device driver to do endian swap instead because SWAP_IO_SPACE is global wide macro. Once we set it, other peripheral such as USB has to change its register access as well