From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753884AbdFMR5M (ORCPT ); Tue, 13 Jun 2017 13:57:12 -0400 Received: from foss.arm.com ([217.140.101.70]:52166 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752211AbdFMR5L (ORCPT ); Tue, 13 Jun 2017 13:57:11 -0400 Subject: Re: [PATCH 04/12] coresight: Add support for reading 64bit registers To: Mathieu Poirier References: <1497278211-5001-1-git-send-email-suzuki.poulose@arm.com> <1497278211-5001-5-git-send-email-suzuki.poulose@arm.com> <20170613174558.GB6392@xps15> Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org From: Suzuki K Poulose Message-ID: Date: Tue, 13 Jun 2017 18:57:08 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.8.0 MIME-Version: 1.0 In-Reply-To: <20170613174558.GB6392@xps15> Content-Type: text/plain; charset=us-ascii; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 13/06/17 18:45, Mathieu Poirier wrote: > On Mon, Jun 12, 2017 at 03:36:43PM +0100, Suzuki K Poulose wrote: >> Add support for reading a lower and upper 32bits of a register >> as a single 64bit register. >> >> Cc: Mathieu Poirier >> Signed-off-by: Suzuki K Poulose > > Just a few cosmetic details... Will fix all of them in the next version. Thanks for the review. Suzuki