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From: Sebastian Ott <sebott@redhat.com>
To: Marc Zyngier <maz@kernel.org>,
	Oliver Upton <oliver.upton@linux.dev>,
	 Sascha Bischoff <Sascha.Bischoff@arm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>,
	 Zenghui Yu <yuzenghui@huawei.com>,
	Joey Gouly <joey.gouly@arm.com>,  Joey Gouly <joey.gouly@arm.com>,
	Will Deacon <will@kernel.org>,
	 linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev,
	 linux-kernel@vger.kernel.org
Subject: Failing no-vgic-v3 test
Date: Mon, 27 Oct 2025 12:37:54 +0100 (CET)	[thread overview]
Message-ID: <f9c7fffa-53ba-a506-b48b-07e3df2d1d5a@redhat.com> (raw)

Hey,

on an ampere altra I've got a sad selftest:

[root@virtlab-arm11 kvm]# ./arm64/no-vgic-v3
Random seed: 0x6b8b4567
==== Test Assertion Failure ====
   arm64/no-vgic-v3.c:66: handled
   pid=3793 tid=3793 errno=4 - Interrupted system call
      1  0x0000000000402feb: test_run_vcpu at no-vgic-v3.c:128
      2  0x000000000040214f: test_guest_no_gicv3 at no-vgic-v3.c:155 (discriminator 17)
      3   (inlined by) main at no-vgic-v3.c:174 (discriminator 17)
      4  0x0000ffff873eb587: ?? ??:0
      5  0x0000ffff873eb65f: ?? ??:0
      6  0x00000000004022af: _start at ??:?
   ICC_PMR_EL1 no read trap

This is a guest without VGICv3 on GICv3 HW. The test expects UNDEF on reg
access - which is not happening since:

3193287ddffb KVM: arm64: gic-v3: Only set ICH_HCR traps for v2-on-v3 or v3 guests

As a local fix I've done:
diff --git a/arch/arm64/kvm/vgic/vgic-v3.c b/arch/arm64/kvm/vgic/vgic-v3.c
index 6fbb4b099855..1fe53a021926 100644
--- a/arch/arm64/kvm/vgic/vgic-v3.c
+++ b/arch/arm64/kvm/vgic/vgic-v3.c
@@ -297,11 +297,15 @@ void vcpu_set_ich_hcr(struct kvm_vcpu *vcpu)
  {
  	struct vgic_v3_cpu_if *vgic_v3 = &vcpu->arch.vgic_cpu.vgic_v3;

  	if (!vgic_is_v3(vcpu->kvm))
  		return;

  	/* Hide GICv3 sysreg if necessary */
-	if (vcpu->kvm->arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V2) {
+	if (!kvm_has_gicv3(vcpu->kvm) ||
+	    vcpu->kvm->arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V2) {
  		vgic_v3->vgic_hcr |= (ICH_HCR_EL2_TALL0 | ICH_HCR_EL2_TALL1 |
  				      ICH_HCR_EL2_TC);
  		return;


but following the intention of the patch above maybe we should do smth
like:
diff --git a/arch/arm64/kvm/vgic/vgic-v3.c b/arch/arm64/kvm/vgic/vgic-v3.c
index 6fbb4b099855..1fe53a021926 100644
--- a/arch/arm64/kvm/vgic/vgic-v3.c
+++ b/arch/arm64/kvm/vgic/vgic-v3.c
@@ -297,11 +297,15 @@ void vcpu_set_ich_hcr(struct kvm_vcpu *vcpu)
  {
  	struct vgic_v3_cpu_if *vgic_v3 = &vcpu->arch.vgic_cpu.vgic_v3;

  	if (!vgic_is_v3(vcpu->kvm))
  		return;

  	/* Hide GICv3 sysreg if necessary */
-	if (vcpu->kvm->arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V2) {
+	if (kvm_has_feat(vcpu->kvm, ID_AA64PFR0_EL1, GIC, NI) ||
+	    vcpu->kvm->arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V2) {
  		vgic_v3->vgic_hcr |= (ICH_HCR_EL2_TALL0 | ICH_HCR_EL2_TALL1 |
  				      ICH_HCR_EL2_TC);
  		return;

Thoughts?
Sebastian


             reply	other threads:[~2025-10-27 11:38 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-27 11:37 Sebastian Ott [this message]
2025-10-27 12:01 ` Sascha Bischoff
2025-10-27 12:17   ` Sebastian Ott

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