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From: Larisa Ileana Grigore <larisa.grigore@oss.nxp.com>
To: Krzysztof Kozlowski <krzk@kernel.org>
Cc: NXP S32 Linux Team <s32@nxp.com>,
	Alim Akhtar <alim.akhtar@samsung.com>,
	Avri Altman <avri.altman@sandisk.com>,
	Bart Van Assche <bvanassche@acm.org>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>, Frank Li <Frank.Li@nxp.com>,
	Sascha Hauer <s.hauer@pengutronix.de>,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	Fabio Estevam <festevam@gmail.com>,
	"James E.J. Bottomley" <James.Bottomley@hansenpartnership.com>,
	"Martin K. Petersen" <mkp@kernel.org>,
	Sai Krishna Potthuri <sai.krishna.potthuri@amd.com>,
	Ajay Neeli <ajay.neeli@amd.com>,
	Manivannan Sadhasivam <mani@kernel.org>,
	Pedro Sousa <pedrom.sousa@synopsys.com>,
	Hannes Reinicke <hare@suse.de>,
	Joao Pinto <Joao.Pinto@synopsys.com>,
	linux-scsi@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, imx@lists.linux.dev,
	linux-arm-kernel@lists.infradead.org,
	linux-arm-msm@vger.kernel.org, clizzi@redhat.com,
	aruizrui@redhat.com, eballetb@redhat.com, echanude@redhat.com
Subject: Re: [PATCH v8 07/12] dt-bindings: ufs: Add NXP S32N79 UFS host controller
Date: Wed, 14 Oct 2026 16:58:30 +0300	[thread overview]
Message-ID: <fa3a025b-0d82-42df-a4cc-e144d6a97b20@oss.nxp.com> (raw)
In-Reply-To: <20261014-valiant-goose-of-revolution-efec17@quoll>

On 10/14/2026 2:10 PM, Krzysztof Kozlowski wrote:
> On Tue, Oct 13, 2026 at 12:29:58PM +0200, Larisa Grigore wrote:
>> +  clocks:
>> +    maxItems: 1
>> +
>> +  clock-names:
>> +    items:
>> +      - const: core
> 
> I don't get why you added the clock-names.
> 
Hello Krzysztof,

The properties, `clock-names` and `operating-points-v2`, are needed to 
let the generic UFS platform code discover and manage the controller clock.

`ufshcd_parse_operating_points()` uses `clock-names` to create the 
corresponding `struct ufs_clk_info` entry and populate 
`hba->clk_list_head`. The UFS core then uses this list to manage the 
clock, including enabling and disabling it during suspend and resume. 
Without this information, the clock would need to be handled separately 
by the S32N79 variant driver.

The OPP table contains one operating point with `opp-hz = <0>`. This is
intentional and follows the semantics documented in `ufs-common.yaml`:

   If clock frequency in the array is "0" then it is assumed that the
   frequency is set by the parent clock or a fixed rate clock source.

On S32N79, the clock rate is configured by an entity outside Linux. 
Linux does not program or scale this rate.

A similar pattern is used by the `amd,versal2-ufs` binding. It describes 
a single clock named `core` together with `freq-table-hz = <0 0>`.

Best regards,
Larisa

>> +
>> +required:
>> +  - compatible
>> +  - reg
>> +  - reg-names
>> +  - clocks
>> +  - clock-names
>> +  - operating-points-v2
> 
> Your opp-table is empty, so requiring such property looks like wrongly
> written driver.
> 
>> +
>> +allOf:
>> +  - $ref: ufs-common.yaml
>> +
>> +unevaluatedProperties: false
>> +
>> +examples:
>> +  - |
>> +    ufshc@4ac80000 {
>> +        compatible = "nxp,s32n79-ufshc";
>> +        reg = <0x4ac80000 0x1000>, <0x4ac40000 0x1000>;
>> +        reg-names = "ufshc", "scm";
>> +        interrupt-parent = <&irqsteer_coss>;
>> +        interrupts = <211>;
>> +        clocks = <&clks 0x92>;
>> +        clock-names = "core";
>> +        operating-points-v2 = <&ufs_opp_table>;
>> +
>> +        ufs_opp_table: opp-table {
>> +            compatible = "operating-points-v2";
>> +
>> +            opp-0 {
>> +                opp-hz = /bits/ 64 <0>;
> 
> Best regards,
> Krzysztof
> 


  reply	other threads:[~2026-10-14 13:58 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-13 10:29 [PATCH v8 00/12] Add S32N79RDB UFS support Larisa Grigore
2026-10-13 10:29 ` [PATCH v8 01/12] scsi: ufs: dwc: Return a negative error if the link is down Larisa Grigore
2026-10-13 10:29 ` [PATCH v8 02/12] ufs: unipro: Move Tx/Rx FSM state definitions to unipro.h Larisa Grigore
2026-10-13 10:29 ` [PATCH v8 03/12] ufs: unipro: Add TX/RX FSM state attributes Larisa Grigore
2026-10-13 10:29 ` [PATCH v8 04/12] ufs: host: Add common Hibern8 TX FSM polling helper Larisa Grigore
2026-10-13 10:29 ` [PATCH v8 05/12] scsi: ufs: Move Versal2 M-PHY CREG access helpers into ufshcd-dwc Larisa Grigore
2026-10-13 10:29 ` [PATCH v8 06/12] scsi: ufs: dwc: Export common clock divider and link status helpers Larisa Grigore
2026-10-13 10:29 ` [PATCH v8 07/12] dt-bindings: ufs: Add NXP S32N79 UFS host controller Larisa Grigore
2026-10-13 14:26   ` Frank Li
2026-10-14 11:10   ` Krzysztof Kozlowski
2026-10-14 13:58     ` Larisa Ileana Grigore [this message]
2026-10-13 10:29 ` [PATCH v8 08/12] scsi: ufs: dwc: Sort CBCRCTRL and CBREFCLKCTRL2 by offset Larisa Grigore
2026-10-13 10:30 ` [PATCH v8 09/12] scsi: ufs: Add NXP S32N79 UFS host controller driver Larisa Grigore
2026-10-13 10:30 ` [PATCH v8 10/12] arm64: dts: freescale: s32n79: Add UFS host controller Larisa Grigore
2026-10-14 11:07   ` Krzysztof Kozlowski
2026-10-14 13:59     ` Larisa Ileana Grigore
2026-10-13 10:30 ` [PATCH v8 11/12] arm64: dts: freescale: s32n79-rdb: Enable UFS Larisa Grigore
2026-10-13 10:30 ` [PATCH v8 12/12] MAINTAINERS: Add NXP S32N7 UFS host controller entry Larisa Grigore
2026-10-13 14:28   ` Frank Li
2026-10-14 13:59     ` Larisa Ileana Grigore

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