Re: RE: [PATCH v2 0/7] x86/resctrl : Support L3 Smart Data Cache Injection Allocation Enforcement (SDCIAE)

["Moger, Babu" <babu.moger@amd.com>]

Hi Tony,

Thanks for testing..

On 12/18/24 17:27, Luck, Tony wrote:
> I don't have an AMD system, so I added a couple of hacks to the code to pretend I did.
> My hacks might have missed something, so the below test may not fail for you.
> 
> My test:
> 
> # echo 1 > info/L3/io_alloc
> # cat info/L3/bit_usage
> 
> This gave me a console splat starting with:
> 
> [  163.801078] invalid mode for closid 14

I recreated the issue.

1124.714954] ------------[ cut here ]------------
[ 1124.714955] invalid mode for closid 15
[ 1124.714956] WARNING: CPU: 71 PID: 3553 at
arch/x86/kernel/cpu/resctrl/rdtgroup.c:1082 rdt_bit_usage_show+0x238/0x2d0


> 
> That happened because in rdt_bit_usage_show()
> 
>                 for (i = 0; i < closids_supported(); i++) {
>                         if (!closid_allocated(i))
>                                 continue;
>                         ctrl_val = resctrl_arch_get_config(r, dom, i,
>                                                            s->conf_type);
>                         mode = rdtgroup_mode_by_closid(i);
> 
> CLOSID 14 is my highest. It's supported, and allocated.
> 
> rdtgroup_mode_by_closid() searches rdt_all_groups to find
> one using CLOSID 14, but there isn't one. So it returns
> RDT_NUM_MODES
> 
> Maybe RDT_NUM_MODES isn't invalid in the switch()
> Looks like it should be same action as RDT_MODE_SHAREABLE?

Yes. That is correct. Will take care of this in next revision.
-- 
Thanks
Babu Moger