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From: Eddie James <eajames@linux.vnet.ibm.com>
To: Andy Shevchenko <andy.shevchenko@gmail.com>,
	Eddie James <eajames@linux.ibm.com>
Cc: linux-spi <linux-spi@vger.kernel.org>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	Mark Brown <broonie@kernel.org>, Joel Stanley <joel@jms.id.au>,
	Andrew Jeffery <andrew@aj.id.au>
Subject: Re: [PATCH v2] spi: Add FSI-attached SPI controller driver
Date: Mon, 24 Feb 2020 12:54:09 -0600	[thread overview]
Message-ID: <fab0fdf2-6ce7-7635-178e-9bd090d03dc0@linux.vnet.ibm.com> (raw)
In-Reply-To: <CAHp75VfHAS46-kMyg7Ky4jn7zmkht6wd9ayCfn+rrO0R6aNr6A@mail.gmail.com>


On 2/4/20 5:05 AM, Andy Shevchenko wrote:
> On Tue, Feb 4, 2020 at 12:30 AM Eddie James <eajames@linux.ibm.com> wrote:
>> There exists a set of SPI controllers on some POWER processors that may
>> be accessed through the FSI bus. Add a driver to traverse the FSI CFAM
>> engine that can access and drive the SPI controllers. This driver would
>> typically be used by a baseboard management controller (BMC).
>>
>> The SPI controllers operate by means of programming a sequencing engine
>> which automatically manages the usual SPI protocol buses. The driver
>> programs each transfer into the sequencer as various operations
>> specifying the slave chip and shifting data in and out on the lines.
> Some comments left unsettled in v1, thus applicable here.


I think I addressed all of Andy's comments on v1 now, if Andy agreed 
about leaving the byte shifting as-is in fsi_spi_data_in/out.


Thanks,

Eddie


>

  reply	other threads:[~2020-02-24 18:54 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-03 22:30 Eddie James
2020-02-04 11:05 ` Andy Shevchenko
2020-02-24 18:54   ` Eddie James [this message]
2020-02-25  5:08 ` Joel Stanley
2020-02-25  9:38   ` Andy Shevchenko
2020-02-25 19:45   ` Eddie James

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