From: "Christian König" <christian.koenig@amd.com>
To: "Gerd Hoffmann" <kraxel@redhat.com>,
"Christian König" <christian.koenig@amd.com>
Cc: dri-devel@lists.freedesktop.org,
"Daniel Vetter" <daniel.vetter@intel.com>,
"Michel Dänzer" <michel@daenzer.net>,
"open list" <linux-kernel@vger.kernel.org>,
amd-gfx@lists.freedesktop.org, "Wentland,
Harry" <Harry.Wentland@amd.com>
Subject: Re: [PATCH] drm: fourcc byteorder: brings header file comments in line with reality.
Date: Fri, 21 Apr 2017 15:27:47 +0200 [thread overview]
Message-ID: <fab1354d-bb5d-b196-a698-f465906ffc68@amd.com> (raw)
In-Reply-To: <041de509-f56f-f460-1961-810bc5a3c18e@vodafone.de>
Adding Harry to this mail thread as well, cause is one of the people
really affected by this.
Christian.
Am 21.04.2017 um 15:21 schrieb Christian König:
> Am 21.04.2017 um 15:12 schrieb Gerd Hoffmann:
>> Hi,
>>
>>>> "native" to me feels more like "native to the GPU" since these things
>>>> really are tied to the GPU not the CPU. That's also why I went with
>>>> the
>>>> explicit endianness originally so that the driver could properly
>>>> declare
>>>> what the GPU supports.
>>> And to be honest I would really prefer to stick with that approach for
>>> exactly that reason.
>>>
>>> The proposed change would require that drivers have different code path
>>> for different CPU byte order. Those code path tend to be not tested
>>> very
>>> well and are additional complexity we probably don't want inside the
>>> driver.
>> We can add fixed-endian #defines without too much effort, at least for
>> the 8 bits per color formats. In qemu we have the same problem, only
>> with pixman. Those formats are native endian too, but often we have to
>> handle a fixed format, so we did this:
>>
>> /*
>> * pixman image formats are defined to be native endian,
>> * that means host byte order on qemu. So we go define
>> * fixed formats here for cases where it is needed, like
>> * feeding libjpeg / libpng and writing screenshots.
>> */
>>
>> #ifdef HOST_WORDS_BIGENDIAN
>> # define PIXMAN_BE_r8g8b8 PIXMAN_r8g8b8
>> # define PIXMAN_BE_x8r8g8b8 PIXMAN_x8r8g8b8
>> # define PIXMAN_BE_a8r8g8b8 PIXMAN_a8r8g8b8
>> # define PIXMAN_BE_b8g8r8x8 PIXMAN_b8g8r8x8
>> # define PIXMAN_BE_b8g8r8a8 PIXMAN_b8g8r8a8
>> # define PIXMAN_BE_r8g8b8x8 PIXMAN_r8g8b8x8
>> # define PIXMAN_BE_r8g8b8a8 PIXMAN_r8g8b8a8
>> # define PIXMAN_BE_x8b8g8r8 PIXMAN_x8b8g8r8
>> # define PIXMAN_BE_a8b8g8r8 PIXMAN_a8b8g8r8
>> # define PIXMAN_LE_x8r8g8b8 PIXMAN_b8g8r8x8
>> #else
>> # define PIXMAN_BE_r8g8b8 PIXMAN_b8g8r8
>> # define PIXMAN_BE_x8r8g8b8 PIXMAN_b8g8r8x8
>> # define PIXMAN_BE_a8r8g8b8 PIXMAN_b8g8r8a8
>> # define PIXMAN_BE_b8g8r8x8 PIXMAN_x8r8g8b8
>> # define PIXMAN_BE_b8g8r8a8 PIXMAN_a8r8g8b8
>> # define PIXMAN_BE_r8g8b8x8 PIXMAN_x8b8g8r8
>> # define PIXMAN_BE_r8g8b8a8 PIXMAN_a8b8g8r8
>> # define PIXMAN_BE_x8b8g8r8 PIXMAN_r8g8b8x8
>> # define PIXMAN_BE_a8b8g8r8 PIXMAN_r8g8b8a8
>> # define PIXMAN_LE_x8r8g8b8 PIXMAN_x8r8g8b8
>> #endif
>
> Exactly what Mesa did as well.
>
>>> My personal opinion is that formats in drm_fourcc.h should be
>>> independent of the CPU byte order and the function
>>> drm_mode_legacy_fb_format() and drivers depending on that incorrect
>>> assumption be fixed instead.
>> The problem is this isn't a kernel-internal thing any more. With the
>> addition of the ADDFB2 ioctl the fourcc codes became part of the
>> kernel/userspace abi ...
>
> I know and that's exactly the reason I'm going to object those changes.
>
> The kernel/userspace abi is fixed and changing it like this could
> potentially break drivers I'm the co-maintainer of. So that whole
> approach is a clear NAK from my side.
>
> If you find a driver or userspace which doesn't use the formats as
> defined in the comments of drm_fourcc.h the fix the driver instead of
> trying to adjust the common header to broken behavior. Cause the later
> will clearly cause problems with drivers who correctly implemented the
> interface.
>
> Regards,
> Christian.
>
>>
>> cheers,
>> Gerd
>>
>> _______________________________________________
>> dri-devel mailing list
>> dri-devel@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/dri-devel
>
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
next prev parent reply other threads:[~2017-04-21 13:28 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-04-21 7:58 Gerd Hoffmann
2017-04-21 8:06 ` Pekka Paalanen
2017-04-21 9:38 ` Gerd Hoffmann
2017-04-21 9:44 ` Ville Syrjälä
2017-04-21 9:25 ` Ville Syrjälä
2017-04-21 9:50 ` Gerd Hoffmann
2017-04-21 11:05 ` Ville Syrjälä
2017-04-21 11:08 ` Ville Syrjälä
2017-04-21 11:40 ` Pekka Paalanen
2017-04-21 11:49 ` Ville Syrjälä
2017-04-21 12:02 ` Christian König
2017-04-21 11:41 ` Gerd Hoffmann
2017-04-21 11:42 ` Christian König
2017-04-21 13:12 ` Gerd Hoffmann
2017-04-21 13:21 ` Christian König
2017-04-21 13:27 ` Christian König [this message]
2017-04-21 15:21 ` Harry Wentland
2017-04-21 16:14 ` Gerd Hoffmann
2017-04-22 10:05 ` Ville Syrjälä
2017-04-22 21:59 ` Gerd Hoffmann
2017-04-24 6:57 ` Michel Dänzer
2017-04-24 13:03 ` Ville Syrjälä
2017-04-25 1:12 ` Michel Dänzer
2017-04-25 3:08 ` Michel Dänzer
2017-04-25 10:26 ` Ville Syrjälä
2017-04-26 2:10 ` Michel Dänzer
2017-05-11 21:23 ` Pavel Machek
2017-05-12 9:10 ` Ville Syrjälä
2017-04-21 14:49 ` Ilia Mirkin
2017-04-21 16:59 ` Ville Syrjälä
2017-04-22 5:07 ` Ilia Mirkin
2017-04-22 9:50 ` Ville Syrjälä
2017-04-22 13:40 ` Ilia Mirkin
2017-04-22 13:48 ` Ilia Mirkin
2017-04-22 19:24 ` Ilia Mirkin
2017-04-24 6:33 ` Michel Dänzer
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