From: Baolu Lu <baolu.lu@linux.intel.com>
To: Jacob Pan <jacob.jun.pan@linux.intel.com>,
LKML <linux-kernel@vger.kernel.org>,
iommu@lists.linux.dev, Jason Gunthorpe <jgg@nvidia.com>,
Joerg Roedel <joro@8bytes.org>,
dmaengine@vger.kernel.org, vkoul@kernel.org
Cc: baolu.lu@linux.intel.com, Robin Murphy <robin.murphy@arm.com>,
Will Deacon <will@kernel.org>,
David Woodhouse <dwmw2@infradead.org>,
Raj Ashok <ashok.raj@intel.com>,
"Tian, Kevin" <kevin.tian@intel.com>, Yi Liu <yi.l.liu@intel.com>,
"Yu, Fenghua" <fenghua.yu@intel.com>,
Dave Jiang <dave.jiang@intel.com>,
Tony Luck <tony.luck@intel.com>,
"Zanussi, Tom" <tom.zanussi@intel.com>
Subject: Re: [PATCH 1/4] iommu/vt-d: Implement set device pasid op for default domain
Date: Thu, 2 Mar 2023 22:06:40 +0800 [thread overview]
Message-ID: <fad7f28f-b4e8-c1c3-4ca4-a48c5c6d7f4a@linux.intel.com> (raw)
In-Reply-To: <20230302005959.2695267-2-jacob.jun.pan@linux.intel.com>
On 2023/3/2 8:59, Jacob Pan wrote:
> On VT-d platforms, legacy DMA requests without PASID use device’s
> default domain, where RID_PASID is always attached. Device drivers
> can then use the DMA API for all in-kernel DMA on the RID.
>
> Ideally, devices capable of using ENQCMDS can also transparently use the
> default domain, consequently DMA API. However, VT-d architecture
> dictates that the PASID used by ENQCMDS must be different from the
> RID_PASID value.
>
> To provide support for transparent use of DMA API with non-RID_PASID
> value, this patch implements the set_dev_pasid() function for the
> default domain. The idea is that device drivers wishing to use ENQCMDS
> to submit work on buffers mapped by DMA API will call
> iommu_attach_device_pasid() beforehand.
>
> Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
> ---
> drivers/iommu/intel/iommu.c | 32 ++++++++++++++++++++++++++++++++
> 1 file changed, 32 insertions(+)
>
> diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
> index 10f657828d3a..a0cb3bc851ac 100644
> --- a/drivers/iommu/intel/iommu.c
> +++ b/drivers/iommu/intel/iommu.c
> @@ -4665,6 +4665,10 @@ static void intel_iommu_remove_dev_pasid(struct device *dev, ioasid_t pasid)
> case IOMMU_DOMAIN_SVA:
> intel_svm_remove_dev_pasid(dev, pasid);
> break;
> + case IOMMU_DOMAIN_DMA:
> + case IOMMU_DOMAIN_DMA_FQ:
> + case IOMMU_DOMAIN_IDENTITY:
> + break;
> default:
> /* should never reach here */
> WARN_ON(1);
> @@ -4675,6 +4679,33 @@ static void intel_iommu_remove_dev_pasid(struct device *dev, ioasid_t pasid)
> intel_pasid_tear_down_entry(iommu, dev, pasid, false);
> }
>
> +static int intel_iommu_set_dev_pasid(struct iommu_domain *domain,
> + struct device *dev, ioasid_t pasid)
> +{
> + struct device_domain_info *info = dev_iommu_priv_get(dev);
> + struct dmar_domain *dmar_domain = to_dmar_domain(domain);
> + struct intel_iommu *iommu = info->iommu;
> + int ret = 0;
> +
> + if (!sm_supported(iommu) || !info)
@info has been referenced. !info check makes no sense.
Add pasid_supported(iommu).
Do you need to check whether the domain is compatible for this rid
pasid?
> + return -ENODEV;
> +
> + if (WARN_ON(pasid == PASID_RID2PASID))
> + return -EINVAL;
Add a call to domain_attach_iommu() here to get a refcount of the domain
ID. And call domain_detach_iommu() in intel_iommu_remove_dev_pasid().
> +
> + if (hw_pass_through && domain_type_is_si(dmar_domain))
> + ret = intel_pasid_setup_pass_through(iommu, dmar_domain,
> + dev, pasid);
> + else if (dmar_domain->use_first_level)
> + ret = domain_setup_first_level(iommu, dmar_domain,
> + dev, pasid);
> + else
> + ret = intel_pasid_setup_second_level(iommu, dmar_domain,
> + dev, pasid);
> +
> + return ret;
> +}
Do you need to consider pasid cache invalidation?
> +
> const struct iommu_ops intel_iommu_ops = {
> .capable = intel_iommu_capable,
> .domain_alloc = intel_iommu_domain_alloc,
> @@ -4702,6 +4733,7 @@ const struct iommu_ops intel_iommu_ops = {
> .iova_to_phys = intel_iommu_iova_to_phys,
> .free = intel_iommu_domain_free,
> .enforce_cache_coherency = intel_iommu_enforce_cache_coherency,
> + .set_dev_pasid = intel_iommu_set_dev_pasid,
> }
> };
>
Best regards,
baolu
next prev parent reply other threads:[~2023-03-02 14:08 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-02 0:59 [PATCH 0/4] Re-enable IDXD kernel workqueue under DMA API Jacob Pan
2023-03-02 0:59 ` [PATCH 1/4] iommu/vt-d: Implement set device pasid op for default domain Jacob Pan
2023-03-02 9:37 ` Tian, Kevin
2023-03-02 19:25 ` Jacob Pan
2023-03-02 14:06 ` Baolu Lu [this message]
2023-03-03 2:36 ` Tian, Kevin
2023-03-03 2:48 ` Baolu Lu
2023-03-03 3:02 ` Tian, Kevin
2023-03-03 4:38 ` Baolu Lu
2023-03-03 5:35 ` Tian, Kevin
2023-03-06 19:04 ` Jacob Pan
2023-03-06 19:02 ` Jason Gunthorpe
2023-03-06 23:45 ` Jacob Pan
2023-03-07 0:45 ` Jacob Pan
2023-03-03 5:38 ` Tian, Kevin
2023-03-03 16:35 ` Jacob Pan
2023-03-05 3:05 ` Baolu Lu
2023-03-06 8:18 ` Tian, Kevin
2023-03-06 18:43 ` Jacob Pan
2023-03-06 18:29 ` Jacob Pan
2023-03-06 12:57 ` Jason Gunthorpe
2023-03-06 17:36 ` Jacob Pan
2023-03-06 17:41 ` Jason Gunthorpe
2023-03-07 2:15 ` Baolu Lu
2023-03-02 0:59 ` [PATCH 2/4] iommu/vt-d: Use non-privileged mode for all PASIDs Jacob Pan
2023-03-02 14:11 ` Baolu Lu
2023-03-03 21:40 ` Jacob Pan
2023-03-02 0:59 ` [PATCH 3/4] iommu/sva: Support reservation of global PASIDs Jacob Pan
2023-03-02 3:06 ` kernel test robot
2023-03-02 3:19 ` kernel test robot
2023-03-02 9:43 ` Tian, Kevin
2023-03-03 21:47 ` Jacob Pan
2023-03-06 13:01 ` Jason Gunthorpe
2023-03-06 17:44 ` Jacob Pan
2023-03-06 17:43 ` Jason Gunthorpe
2023-03-06 17:57 ` Jacob Pan
2023-03-06 18:19 ` Jason Gunthorpe
2023-03-06 18:48 ` Luck, Tony
2023-03-06 19:05 ` Jason Gunthorpe
2023-03-09 17:06 ` Jacob Pan
2023-03-16 7:25 ` Tian, Kevin
2023-03-20 17:22 ` Jason Gunthorpe
2023-03-02 0:59 ` [PATCH 4/4] dmaengine/idxd: Re-enable kernel workqueue under DMA API Jacob Pan
2023-03-02 1:03 ` Dave Jiang
2023-03-02 9:47 ` Tian, Kevin
2023-03-02 12:57 ` Jason Gunthorpe
2023-03-03 21:49 ` Jacob Pan
2023-03-03 22:12 ` Jacob Pan
2023-03-03 1:19 ` Baolu Lu
2023-03-03 21:52 ` Jacob Pan
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=fad7f28f-b4e8-c1c3-4ca4-a48c5c6d7f4a@linux.intel.com \
--to=baolu.lu@linux.intel.com \
--cc=ashok.raj@intel.com \
--cc=dave.jiang@intel.com \
--cc=dmaengine@vger.kernel.org \
--cc=dwmw2@infradead.org \
--cc=fenghua.yu@intel.com \
--cc=iommu@lists.linux.dev \
--cc=jacob.jun.pan@linux.intel.com \
--cc=jgg@nvidia.com \
--cc=joro@8bytes.org \
--cc=kevin.tian@intel.com \
--cc=linux-kernel@vger.kernel.org \
--cc=robin.murphy@arm.com \
--cc=tom.zanussi@intel.com \
--cc=tony.luck@intel.com \
--cc=vkoul@kernel.org \
--cc=will@kernel.org \
--cc=yi.l.liu@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
Powered by JetHome