From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932237AbdETNdc (ORCPT ); Sat, 20 May 2017 09:33:32 -0400 Received: from mail-wm0-f66.google.com ([74.125.82.66]:36774 "EHLO mail-wm0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755836AbdETNd3 (ORCPT ); Sat, 20 May 2017 09:33:29 -0400 From: Cosar Dindar To: robh+dt@kernel.org Cc: mark.rutland@arm.com, linux@armlinux.org.uk, mcoquelin.stm32@gmail.com, alexandre.torgue@st.com, fabien.dessenne@st.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Cosar Dindar Subject: [PATCH v2 5/5] ARM: dts: stm32: Add CRC support to stm32f429 Date: Sat, 20 May 2017 16:33:19 +0300 Message-Id: X-Mailer: git-send-email 2.7.4 In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add CRC32 Crypto support to stm32f429. Signed-off-by: Cosar Dindar --- arch/arm/boot/dts/stm32f429.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi index b2a2b5c..18343de 100644 --- a/arch/arm/boot/dts/stm32f429.dtsi +++ b/arch/arm/boot/dts/stm32f429.dtsi @@ -766,6 +766,13 @@ }; }; + crc: crc@40023000 { + compatible = "st,stm32f4-crc"; + reg = <0x40023000 0x400>; + clocks = <&rcc 0 STM32F4_AHB1_CLOCK(CRC)>; + status = "disabled"; + }; + rcc: rcc@40023810 { #reset-cells = <1>; #clock-cells = <2>; -- 2.7.4