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Tue, 03 Jun 2025 00:35:25 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHbrLjN/LK2D8S83yJequqnD62klgE0P1XAXLcbq1Q+J2LZWaSZQvhy+vzl67jRzKVjcPVj7w== X-Received: by 2002:a05:6a20:2589:b0:1f5:8b9b:ab54 with SMTP id adf61e73a8af0-21ad95818b7mr27385809637.23.1748936124761; Tue, 03 Jun 2025 00:35:24 -0700 (PDT) Received: from [10.92.214.105] ([202.46.23.19]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-b2ecebb6b5csm6627188a12.72.2025.06.03.00.35.19 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 03 Jun 2025 00:35:24 -0700 (PDT) Message-ID: Date: Tue, 3 Jun 2025 13:05:17 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.15.1 Subject: Re: [PATCH v3 3/3] arm64: qcom: sc7280: Move phy, perst to root port node Content-Language: en-US To: Manivannan Sadhasivam Cc: Lorenzo Pieralisi , =?UTF-8?Q?Krzysztof_Wilczy=c5=84ski?= , Rob Herring , Bjorn Helgaas , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , cros-qcom-dts-watchers@chromium.org, linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, quic_vbadigan@quicinc.com, quic_mrana@quicinc.com References: <20250419-perst-v3-0-1afec3c4ea62@oss.qualcomm.com> <20250419-perst-v3-3-1afec3c4ea62@oss.qualcomm.com> <0e1d8b8e-9dd3-a377-d7e0-93ec77cf397f@oss.qualcomm.com> From: Krishna Chaitanya Chundru In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNjAzMDA2NSBTYWx0ZWRfX9fE+cI922+HL 86M4Ud54izKr7BjBy5LA6zqTxfOis3RntjAYQWncspRSrqKlLVYFXAxWBQm0v+D3/NtabiPQg6b hBTzctOqOHPb3Jl89JoLurSKg8L/OzNRmzPeUDc8oXBHK4Yp+6h8sgidtw/KKFBYcswb/7JMJtT tCKbLAheJOeq317831v1/Ah7/mxPQIVtQ4cf+hseqgA/3DGsLVm5WKbTO1NvrOwUjIXD0baicPL nsXD6N5fVIhvY2wr6r7wCTO/JQFTbkdi+shiGQ9AFwRTj93t25ocYqsY/6knv2HslnqCsY/0FDI 12GaOohCxjFvvMPv31cbvIqKLGh5mwfv6uD+rNlXtf+YcJNyk6EXdkhswD8+uItvTLMpfiWmjmh QAsU3JihLOcPOrXcusLFY0mwcVcVNaomZqG8EL4NJ5rgOSAI+5TOkCqdOhY9mRiRXsAh8fMo X-Proofpoint-ORIG-GUID: kuaDiDsrreQhjXvOPp4LvmukAVlC_NY9 X-Authority-Analysis: v=2.4 cv=OuxPyz/t c=1 sm=1 tr=0 ts=683ea5be cx=c_pps a=WW5sKcV1LcKqjgzy2JUPuA==:117 a=j4ogTh8yFefVWWEFDRgCtg==:17 a=IkcTkHD0fZMA:10 a=6IFa9wvqVegA:10 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=gzpaoVQaGCppcG2blusA:9 a=QEXdDO2ut3YA:10 a=OpyuDcXvxspvyRM73sMx:22 X-Proofpoint-GUID: kuaDiDsrreQhjXvOPp4LvmukAVlC_NY9 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.0.736,FMLib:17.12.80.40 definitions=2025-06-03_01,2025-06-02_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 bulkscore=0 malwarescore=0 impostorscore=0 mlxlogscore=999 lowpriorityscore=0 spamscore=0 mlxscore=0 suspectscore=0 priorityscore=1501 adultscore=0 clxscore=1015 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505280000 definitions=main-2506030065 On 6/3/2025 12:22 PM, Manivannan Sadhasivam wrote: > On Tue, Jun 03, 2025 at 12:03:01PM +0530, Krishna Chaitanya Chundru wrote: >> >> >> On 6/1/2025 12:35 PM, Manivannan Sadhasivam wrote: >>> On Sat, Apr 19, 2025 at 10:49:26AM +0530, Krishna Chaitanya Chundru wrote: >>>> There are many places we agreed to move the wake and perst gpio's >>>> and phy etc to the pcie root port node instead of bridge node[1]. >>> >>> Same comment as binding patch applies here. >>> >>>> >>>> So move the phy, phy-names, wake-gpio's in the root port. >>> >>> You are not moving any 'wake-gpios' property. >>> >> ack I will remove it. >>>> There is already reset-gpio defined for PERST# in pci-bus-common.yaml, >>>> start using that property instead of perst-gpio. >>>> >>>> [1] https://lore.kernel.org/linux-pci/20241211192014.GA3302752@bhelgaas/ >>>> >>>> Signed-off-by: Krishna Chaitanya Chundru >>>> --- >>>> arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 5 ++++- >>>> arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 5 ++++- >>>> arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 5 ++++- >>>> arch/arm64/boot/dts/qcom/sc7280.dtsi | 6 ++---- >>>> 4 files changed, 14 insertions(+), 7 deletions(-) >>>> >>>> diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts >>>> index 7a36c90ad4ec8b52f30b22b1621404857d6ef336..3dd58986ad5da0f898537a51715bb5d0fecbe100 100644 >>>> --- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts >>>> +++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts >>>> @@ -709,8 +709,11 @@ &mdss_edp_phy { >>>> status = "okay"; >>>> }; >>>> +&pcie1_port0 { >>>> + reset-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>; >>>> +}; >>>> + >>>> &pcie1 { >>>> - perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>; >>>> pinctrl-0 = <&pcie1_reset_n>, <&pcie1_wake_n>; >>>> pinctrl-names = "default"; >>> >>> What about the pinctrl properties? They should also be moved. >>> >> pinctrl can still reside in the host bridge node, which has >> all the gpio's for all the root ports. If we move them to the >> root ports we need to explicitly apply pinctrl settings as these >> not tied with the driver yet. >> > > If the DT node is associated with a device, then the driver core should bind the > pinctrl pins and configure them. Is that not happening here? The root node will not be associated with the driver until enumeration, the controller drivers needs these to be configured before enumeration. - Krishna Chaitanya. > > - Mani >