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Thu, 5 Nov 2026 21:43:32 -0800 From: Alok Kumar To: , , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v4 12/32] gpu: nova-core: mm: add BarMapping Date: Fri, 6 Nov 2026 11:09:45 +0530 Message-ID: X-Mailer: git-send-email 2.53.0 In-Reply-To: References: X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM3PEPF000265C6:EE_|SN7PR12MB8791:EE_ X-MS-Office365-Filtering-Correlation-Id: 8cdd0662-d798-47ba-3c08-08df3bc8f25e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|7416014|36860700016|376014|23010399003|1800799024|10067099003|22082099003|18002099003|56012099006|11063799006|261021135927099003|261028144727099003|261009223027099003|261102123227099003|261026121527099003|261026140227099003|261022075727099003|261022105027099003|261021121427099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: Vv/edCQ9TsX91Luh+/2/4zX+munRAqA6+bvSsrn+ukNogl17Vok9CZlVgqyvSyj6smwiTWgPJcNm6lDgbDNmr9cqJNQGssiV05mUj6cKqDVIRHGHPqldfzV8vO+eLKJddksQJfvWMeXOsCENC27kyw23AiVKvhp38ni7bGc0ipnp41LB7FrE8VXcrEaMZfd66ef/Pn3yoMA0dEEfP6T5ZQx2pHcquHzBbZXYg6eNH2hNEMctaOcSPKAJVCO1xzaOX34NKS1/cQXDYtzUmV2z/hGsD8e1p+3kljB0yUb/etqfZzKZt6j9q1iuzBnQ0/xt7HsXgbZOl+YO9+xUKrYwbcky95pHIPn60Tbkw75N49GROg4TRoBFtz+NiehYQ/AZhKwC2/7gQjk3pN4k8fu/cjtkzIiy/8FzTDTg+viHWzIFxdxglLCGCKeyFa0KyW33 X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Nov 2026 05:43:55.4619 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8cdd0662-d798-47ba-3c08-08df3bc8f25e X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM3PEPF000265C6.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB8791 From: Zhi Wang vGPU communication buffers need CPU access to regions within their VramBlocks. Add BarMapping to map these regions through BAR1, including regions that start or end within a page. Retain the backing region and borrow BarUser and the MM mutex for the mapping's lifetime. Restrict CPU accesses to the region's byte range, and unmap on drop using the retained MM dependency. Provide an explicit unmap operation so owners can observe errors before releasing resources. Keep the mapping and backing region on failure, remember the first error and reject subsequent accesses. Owners must retain failed mappings until device teardown; drop does not retry an unmap that already failed. Cc: Alistair Popple Signed-off-by: Zhi Wang Signed-off-by: Alok Kumar --- drivers/gpu/nova-core/mm/bar_user.rs | 145 +++++++++++++++++++++++++++ 1 file changed, 145 insertions(+) diff --git a/drivers/gpu/nova-core/mm/bar_user.rs b/drivers/gpu/nova-core/mm/bar_user.rs index 7f389aea7ca3..d4364f94b13e 100644 --- a/drivers/gpu/nova-core/mm/bar_user.rs +++ b/drivers/gpu/nova-core/mm/bar_user.rs @@ -7,6 +7,10 @@ io::Io, new_mutex, prelude::*, + ptr::{ + Alignable, + Alignment, // + }, sync::Mutex, // }; @@ -18,6 +22,7 @@ MappedRange, Vmm, // }, + vram::VramRegion, GpuMm, Pfn, Vfn, @@ -180,6 +185,146 @@ fn drop(&mut self) { } } +/// A BAR mapping that retains its backing VRAM region. +#[must_use] +pub(crate) struct BarMapping<'map, 'gpu> { + access: BarUserAccess<'map, 'gpu>, + mm: &'map Mutex>, + region: VramRegion, + region_offset: usize, + region_size: usize, + unmap_error: Option, +} + +#[expect(dead_code)] +impl<'map, 'gpu> BarMapping<'map, 'gpu> { + /// Maps the containing pages while restricting CPU access to the requested byte range. + pub(crate) fn new( + bar_user: &'map BarUser<'gpu>, + mm: &'map Mutex>, + region: VramRegion, + writable: bool, + ) -> Result { + let page_size: u64 = PAGE_SIZE.into_safe_cast(); + let page_align = Alignment::new::(); + + let region_start = region.address(); + let region_end = region_start.checked_add(region.size()).ok_or(EOVERFLOW)?; + + let map_start = region_start.align_down(page_align); + let map_end = region_end.align_up(page_align).ok_or(EOVERFLOW)?; + let map_size = map_end.checked_sub(map_start).ok_or(EINVAL)?; + let num_pages = usize::try_from(map_size / page_size).map_err(|_| EOVERFLOW)?; + if num_pages == 0 { + return Err(EINVAL); + } + + let region_offset = usize::try_from(region_start - map_start).map_err(|_| EOVERFLOW)?; + let region_size = usize::try_from(region.size()).map_err(|_| EOVERFLOW)?; + + let mut pfns = KVec::with_capacity(num_pages, GFP_KERNEL)?; + for page in 0..num_pages { + let page = u64::try_from(page).map_err(|_| EOVERFLOW)?; + let byte_offset = page.checked_mul(page_size).ok_or(EOVERFLOW)?; + let address = map_start.checked_add(byte_offset).ok_or(EOVERFLOW)?; + pfns.push(Pfn::from(VramAddress::from_raw(address)), GFP_KERNEL)?; + } + + let access = bar_user.map(&mut mm.lock(), &pfns, writable)?; + + Ok(Self { + access, + mm, + region, + region_offset, + region_size, + unmap_error: None, + }) + } + + pub(crate) fn region(&self) -> &VramRegion { + &self.region + } + + pub(crate) fn gpu_va_addr(&self) -> Result { + self.access()? + .base() + .into_raw() + .checked_add(u64::try_from(self.region_offset).map_err(|_| EOVERFLOW)?) + .ok_or(EOVERFLOW) + } + + pub(crate) const fn size(&self) -> usize { + self.region_size + } + + fn access(&self) -> Result<&BarUserAccess<'map, 'gpu>> { + if self.access.mapped.is_none() { + return Err(ENODEV); + } + if let Some(error) = self.unmap_error { + return Err(error); + } + Ok(&self.access) + } + + fn access_offset(&self, offset: usize, width: usize) -> Result { + let region_end = offset.checked_add(width).ok_or(EOVERFLOW)?; + if region_end > self.region_size { + return Err(EINVAL); + } + + let access_offset = self.region_offset.checked_add(offset).ok_or(EOVERFLOW)?; + if !access_offset.is_multiple_of(width) { + return Err(EINVAL); + } + + Ok(access_offset) + } + + pub(crate) fn try_read32(&self, offset: usize) -> Result { + self.access()? + .try_read32(self.access_offset(offset, size_of::())?) + } + + pub(crate) fn try_write32(&self, value: u32, offset: usize) -> Result { + self.access()? + .try_write32(value, self.access_offset(offset, size_of::())?) + } + + pub(crate) fn try_write64(&self, value: u64, offset: usize) -> Result { + self.access()? + .try_write64(value, self.access_offset(offset, size_of::())?) + } + + /// Unmap while retaining the mapping and its backing storage on failure. + /// + /// The first error is retained; later calls do not retry the operation. + pub(crate) fn unmap(&mut self) -> Result { + if let Some(error) = self.unmap_error { + return Err(error); + } + let result = self.access.unmap(&mut self.mm.lock()); + if let Err(error) = result { + self.unmap_error = Some(error); + } + result + } +} + +impl Drop for BarMapping<'_, '_> { + /// Drop unmaps the region and may sleep. Call [`Self::unmap`] to observe errors; + /// on failure the owner must retain this object until device teardown. + fn drop(&mut self) { + if self.unmap_error.is_some() { + return; + } + if let Err(error) = self.unmap() { + kernel::pr_err!("failed to unmap BAR1 region: {:?}\n", error); + } + } +} + /// Run MM subsystem self-tests during probe. /// /// Tests page table infrastructure and `BAR1` MMIO access using the `BAR1` -- 2.53.0